To access the release, please first fill out this registration form with your GitHub username. The rest of the information helps us learn a little bit about you, and keep in touch with you about NetFPGA updates and news.
The NetFPGA is an open source hardware and software platform designed for research and teaching. Currently there are two supported platforms: NetFPGA-SUME and NetFPGA-PLUS and three old platforms: NetFPGA-1G-CML, NetFPGA-10G and the NetFPGA-1G. These platforms allow researchers, and students to build prototypes of high-speed, hardware-accelerated networking systems. As of 2019 the NetFPGA platforms have been used in over 400 academic papers. Our platforms are open-source and the hardware is made available at low cost through donations of gifts and silicon chips by sponsors of the NetFPGA project.
-
Tutorials have been held worldwide to teach new users with hands-on experience using the NetFPGA. There are now over 150 groups around the globe that use the NetFPGA.
+ NetFPGA
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
NetFPGA
+
+
+
+
+
+
+
+
+
+
About NetFPGA
+
The NetFPGA is an open source hardware and software platform designed for research and teaching. Currently there are two supported platforms: NetFPGA-SUME and NetFPGA-PLUS and three old platforms: NetFPGA-1G-CML, NetFPGA-10G and the NetFPGA-1G. These platforms allow researchers, and students to build prototypes of high-speed, hardware-accelerated networking systems. As of 2019 the NetFPGA platforms have been used in over 400 academic papers. Our platforms are open-source and the hardware is made available at low cost through donations of gifts and silicon chips by sponsors of the NetFPGA project.
+
Tutorials have been held worldwide to teach new users with hands-on experience using the NetFPGA. There are now over 150 groups around the globe that use the NetFPGA.
Vainstein, C., Katz, A., Birk, Y., & Nemirovsky, Y. (2017, November). Prototype of real-time single photon avalanche diode-based muzzle flash detector. In Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2017 IEEE International Conference on (pp. 1-4). IEEE.
Ho, Bao, et al. Secured-OFS: A Novel OpenFlow Switch Architecture with Integrated Security Functions. International Conference on Advances in Information and Communication Technology. Springer, Cham, 2016.
Cao, J., Sun, L., Zheng, X., & Jin, J. (2015, October). The investigation and implementation of packet generator with variable traffic and packet size on net FPGA. In Communication Technology (ICCT), 2015 IEEE 16th International Conference on (pp. 117-120). IEEE.
Nakamura, R., Kuga, Y., Sekiya, Y., & Esaki, H. (2015, December). Protocol Independent NIC Offloading for Overlay Networks. In ACM SIGCOMM CoNEXT 2015 Student Workshop.
Wei, Y., Wang, X., Guo, F., Hogan, G., & Collier, M. (2015, June). Energy saving local control policy for green reconfigurable routers. In Communications (ICC), 2015 IEEE international conference on (pp. 221-225). IEEE.
LI, Y. Y., DENG, H. W., WANG, S. Q., & LONG, J. (2014). High-Speed Intelligent Internet Intrusion Defense System based on Deep Learning and NetFPGA. Netinfo Security, 2, 006.
+
LIU, X., WANG, X. J., & LIU, Y. S. (2014). Design and implementation of PON system based on Net FPGA-10G. Optical Communication Technology, 12, 001.
Zhu, M., Liu, Y., Li, J., & Wu, J. (2014, May). CCOF: Congestion control on the fly for Inter-Domain routing. In Local & Metropolitan Area Networks (LANMAN), 2014 IEEE 20th International Workshop on (pp. 1-2). IEEE.
Campora, D., Neufeld, N., & Schwemmer, R. (2014, May). Improvements in the LHCb DAQ. In Real Time Conference (RT), 2014 19th IEEE-NPSS (pp. 1-2). IEEE.
Tsai, P. W., Chou, H. Y., Luo, M. Y., & Yang, C. S. (2013). Design a flexible software development environment on NetFPGA platform. In Applied Mechanics and Materials (Vol. 411, pp. 1665-1669). Trans Tech Publications.
+
Fujun, Y. M. Y. (2013). NETFPGA-BASED DATA PACKET GENERATOR IMPLEMENTATION [J]. Computer Applications and Software, 1, 063.
Molloy, T., Zheng, X., Ormond, O., Guo, F., & Wang, X. (2013, April). Power consumption in a zfilter publish/subscribe based forwarding node. In Information and Communications Technologies (IETICT 2013), IET International Conference on (pp. 14-20). IET.
+
Cica, Z. (2013, October). AES implementation with TDM multiplexing for Internet routers. In Telecommunication in Modern Satellite, Cable and Broadcasting Services (TELSIKS), 2013 11th International Conference on (Vol. 2, pp. 405-408). IEEE.
WANG, J., MU, D. J., ZHANG, H. X., & LIN, Z. Z. (2013). Design and Realization of VCP Network Based on NetFPGA. Computer Technology and Development, 11, 004.
Tsai, P. W., Chou, H. Y., Cheng, P. W., Luo, M. Y., & Yang, C. S. (2013, November). Design and Implementation of a Prioritized Packet-Processing Module on NetFPGA Platform. In High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing (HPCC_EUC), 2013 IEEE 10th International Conference on (pp. 272-277). IEEE.
Tso, F. P., & Pezaros, D. P. (2013, July). Baatdaat: Measurement-based flow scheduling for cloud data centers. In 2013 IEEE Symposium on Computers and Communications (ISCC) (pp. 000765-000770). IEEE.
Odalovic, M., & Radusinovic, I. (2013, November). Improving and simplifying control in OpenFlow networks. In Telecommunications Forum (TELFOR), 2013 21st (pp. 86-89). IEEE.
+
ZHAO, G., & TAO, W. (2013). Virtualization technology of programmable router [J]. Journal of Chongqing University of Posts and Telecommunications (Natural Science Edition), 1, 004.
Tsai, P. W., Cheng, P. W., Chou, H. Y., Luo, M. Y., & Yang, C. S. (2013). Toward inter-connection on OpenFlow research networks. Proceedings of Asia-Pacific Advanced Network, 36, 9-16.
Pandiyarajan, K., Haridas, S., & Varghese, K. (2013, December). Transparent FPGA based device for SQL DDoS mitigation. In Field-Programmable Technology (FPT), 2013 International Conference on (pp. 82-89). IEEE.
Matias, J., Jacob, E., Higuero, M., & Toledo, N. (2012, June). Extending Neutrality to Experimental Facilities. In ACCESS 2012, The Third International Conference on Access Networks (pp. 14-20).
Seddiki, M. S., & Frikha, M. (2012, July). Resource Allocation for Virtual Routers through Non-Cooperative Games. In Computer Communications and Networks (ICCCN), 2012 21st International Conference on (pp. 1-6). IEEE.
Meng, W., Wang, Y., Hu, C., He, K., Li, J., & Liu, B. (2012, March). Greening the Internet Using Multi-frequency Scaling Scheme. In Advanced Information Networking and Applications (AINA), 2012 IEEE 26th International Conference on (pp. 928-935). IEEE.
+
Papadimitriou, K., Vatsolakis, C., & Pnevmatikatos, D. (2012, July). Invited paper: Acceleration of computationally-intensive kernels in the reconfigurable era. In Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2012 7th International Workshop on (pp. 1-5). IEEE.
Teofili, S., Nobile, E., Pontarelli, S., & Bianchi, G. (2011). IDS Rules Adaptation for Packets Pre-filtering in Gbps Line Rates. In Trustworthy Internet (pp. 303-316). Springer Milan.
Antichi, G., Di Pietro, A., Ficara, D., Giordano, S., Procissi, G., Vitucci, F. (2010, September). Packet Classification Through Regular Expression Matching on NetFPGA. European NetFPGA Developers Workshop 2010.
Remodeling the NetFPGA architecture for content processing and filtering (not in proceedings); Bokil Kanchan (Centre for Development of Advanced Computing, India); 2nd North American NetFPGA Developers Workshop; Stanford, CA; August 13, 2010.
Precise Latency Comparison Module for the NetFPGA; Adwait Gupte, John Lockwood (Algo-Logic Systems); 2nd North American NetFPGA Developers Workshop; Stanford, CA; August 13, 2010.
+
Preserving Pacing in Real Networks - An Experimental Study Using NetFPGA; Hamed Tabatabaei, Yashar Ganjali (University of Toronto); 2nd North American NetFPGA Developers Workshop; Stanford, CA; August 13, 2010.
Remodeling the NetFPGA architecture for content processing and filtering; Bokil Kanchan; 1st Asia NetFPGA Developers Workshop; Daejeon, Korea; June 14, 2010.
Antichi, G., Di Pietro, A., Ficara, D., Giordano, S., Procissi, G., Vitucci, F. (2010, September). Packet Classification Through Regular Expression Matching on NetFPGA. European NetFPGA Developers Workshop 2010.
Remodeling the NetFPGA architecture for content processing and filtering (not in proceedings); Bokil Kanchan (Centre for Development of Advanced Computing, India); 2nd North American NetFPGA Developers Workshop; Stanford, CA; August 13, 2010.
Precise Latency Comparison Module for the NetFPGA; Adwait Gupte, John Lockwood (Algo-Logic Systems); 2nd North American NetFPGA Developers Workshop; Stanford, CA; August 13, 2010.
-
Preserving Pacing in Real Networks - An Experimental Study Using NetFPGA; Hamed Tabatabaei, Yashar Ganjali (University of Toronto); 2nd North American NetFPGA Developers Workshop; Stanford, CA; August 13, 2010.
Remodeling the NetFPGA architecture for content processing and filtering; Bokil Kanchan; 1st Asia NetFPGA Developers Workshop; Daejeon, Korea; June 14, 2010.
Teofili, S., Nobile, E., Pontarelli, S., & Bianchi, G. (2011). IDS Rules Adaptation for Packets Pre-filtering in Gbps Line Rates. In Trustworthy Internet (pp. 303-316). Springer Milan.
Matias, J., Jacob, E., Higuero, M., & Toledo, N. (2012, June). Extending Neutrality to Experimental Facilities. In ACCESS 2012, The Third International Conference on Access Networks (pp. 14-20).
Seddiki, M. S., & Frikha, M. (2012, July). Resource Allocation for Virtual Routers through Non-Cooperative Games. In Computer Communications and Networks (ICCCN), 2012 21st International Conference on (pp. 1-6). IEEE.
Meng, W., Wang, Y., Hu, C., He, K., Li, J., & Liu, B. (2012, March). Greening the Internet Using Multi-frequency Scaling Scheme. In Advanced Information Networking and Applications (AINA), 2012 IEEE 26th International Conference on (pp. 928-935). IEEE.
-
Papadimitriou, K., Vatsolakis, C., & Pnevmatikatos, D. (2012, July). Invited paper: Acceleration of computationally-intensive kernels in the reconfigurable era. In Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2012 7th International Workshop on (pp. 1-5). IEEE.
Tsai, P. W., Chou, H. Y., Luo, M. Y., & Yang, C. S. (2013). Design a flexible software development environment on NetFPGA platform. In Applied Mechanics and Materials (Vol. 411, pp. 1665-1669). Trans Tech Publications.
-
Fujun, Y. M. Y. (2013). NETFPGA-BASED DATA PACKET GENERATOR IMPLEMENTATION [J]. Computer Applications and Software, 1, 063.
Molloy, T., Zheng, X., Ormond, O., Guo, F., & Wang, X. (2013, April). Power consumption in a zfilter publish/subscribe based forwarding node. In Information and Communications Technologies (IETICT 2013), IET International Conference on (pp. 14-20). IET.
-
Cica, Z. (2013, October). AES implementation with TDM multiplexing for Internet routers. In Telecommunication in Modern Satellite, Cable and Broadcasting Services (TELSIKS), 2013 11th International Conference on (Vol. 2, pp. 405-408). IEEE.
WANG, J., MU, D. J., ZHANG, H. X., & LIN, Z. Z. (2013). Design and Realization of VCP Network Based on NetFPGA. Computer Technology and Development, 11, 004.
Tsai, P. W., Chou, H. Y., Cheng, P. W., Luo, M. Y., & Yang, C. S. (2013, November). Design and Implementation of a Prioritized Packet-Processing Module on NetFPGA Platform. In High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing (HPCC_EUC), 2013 IEEE 10th International Conference on (pp. 272-277). IEEE.
Tso, F. P., & Pezaros, D. P. (2013, July). Baatdaat: Measurement-based flow scheduling for cloud data centers. In 2013 IEEE Symposium on Computers and Communications (ISCC) (pp. 000765-000770). IEEE.
Odalovic, M., & Radusinovic, I. (2013, November). Improving and simplifying control in OpenFlow networks. In Telecommunications Forum (TELFOR), 2013 21st (pp. 86-89). IEEE.
-
ZHAO, G., & TAO, W. (2013). Virtualization technology of programmable router [J]. Journal of Chongqing University of Posts and Telecommunications (Natural Science Edition), 1, 004.
Tsai, P. W., Cheng, P. W., Chou, H. Y., Luo, M. Y., & Yang, C. S. (2013). Toward inter-connection on OpenFlow research networks. Proceedings of Asia-Pacific Advanced Network, 36, 9-16.
Pandiyarajan, K., Haridas, S., & Varghese, K. (2013, December). Transparent FPGA based device for SQL DDoS mitigation. In Field-Programmable Technology (FPT), 2013 International Conference on (pp. 82-89). IEEE.
LI, Y. Y., DENG, H. W., WANG, S. Q., & LONG, J. (2014). High-Speed Intelligent Internet Intrusion Defense System based on Deep Learning and NetFPGA. Netinfo Security, 2, 006.
-
LIU, X., WANG, X. J., & LIU, Y. S. (2014). Design and implementation of PON system based on Net FPGA-10G. Optical Communication Technology, 12, 001.
Zhu, M., Liu, Y., Li, J., & Wu, J. (2014, May). CCOF: Congestion control on the fly for Inter-Domain routing. In Local & Metropolitan Area Networks (LANMAN), 2014 IEEE 20th International Workshop on (pp. 1-2). IEEE.
Campora, D., Neufeld, N., & Schwemmer, R. (2014, May). Improvements in the LHCb DAQ. In Real Time Conference (RT), 2014 19th IEEE-NPSS (pp. 1-2). IEEE.
Cao, J., Sun, L., Zheng, X., & Jin, J. (2015, October). The investigation and implementation of packet generator with variable traffic and packet size on net FPGA. In Communication Technology (ICCT), 2015 IEEE 16th International Conference on (pp. 117-120). IEEE.
Nakamura, R., Kuga, Y., Sekiya, Y., & Esaki, H. (2015, December). Protocol Independent NIC Offloading for Overlay Networks. In ACM SIGCOMM CoNEXT 2015 Student Workshop.
Wei, Y., Wang, X., Guo, F., Hogan, G., & Collier, M. (2015, June). Energy saving local control policy for green reconfigurable routers. In Communications (ICC), 2015 IEEE international conference on (pp. 221-225). IEEE.
Ho, Bao, et al. Secured-OFS: A Novel OpenFlow Switch Architecture with Integrated Security Functions. International Conference on Advances in Information and Communication Technology. Springer, Cham, 2016.
Vainstein, C., Katz, A., Birk, Y., & Nemirovsky, Y. (2017, November). Prototype of real-time single photon avalanche diode-based muzzle flash detector. In Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2017 IEEE International Conference on (pp. 1-4). IEEE.
diff --git a/_includes/Update-close.md b/_includes/Update-close.md
deleted file mode 100644
index 4670dac..0000000
--- a/_includes/Update-close.md
+++ /dev/null
@@ -1,16 +0,0 @@
-If you have not registered to the NetFPGA-SUME beta program, you will need to do so to access the repository: [Registration Form](SUME-reg-form.html)
-
-You can find more information about NetFPGA-SUME code base in the [NetFPGA-SUME wiki](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki)
-
-More information about the release: [Release-Notes](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Release-Notes)
-
-We invite everyone from the community to use and improve our repository, and hope to see a lot of projects contributed to the repository.
-
-Kind Regards,
-
-The NetFPGA team
-
-
These are some of the open-source projects based on NetFPGA. If you have a project that uses NetFPGA and would like to be featured as part of the NetFPGA ecosystem, please let us know here
Xilinx EDK cores are included in Xilinx ISE installation at no additional charge. The "make cores" script copies those cores to NetFPGA-10G library automatically. Please refer to "Installation" section of Getting Started Guide.
The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
The name and trademarks of copyright holder(s) may NOT be used in advertising or publicity pertaining to the Software or any derivatives without specific, written prior permission.
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
@@ -180,3 +256,40 @@
About the presentors
Adam Covington Adam is a Research Associate of the High-Performance Network Group (HPN) at Stanford University. He is currently working on the NetFPGA project, which enables researchers and instructors to build hardware-accelerated networking systems. Previously, he was a Research Associate with the Reconfigurable Network Group (RNG) at Washington University in St. Louis. While at Washington University he designed, and implemented clustering algorithms on FPGAs and supported a hardware accelerated classification system on the FPX platform. Adam’s current research interests include reconfigurable systems, artificial intelligence (clustering and classification), and applications of artificial intelligence algorithms. Adam completed a Bachelor of Science degree in Computer Engineering from Western Michigan University in April 2003 and accepted a Distinguished Masters of Science Fellowship from Washington University. He completed his Masters of Science degree in Computer Science and Engineering from Washington University in December 2006. Adam continues to provide support for the NetFPGA project which includes helping users worldwide as well as arranging and presenting tutorials.
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
@@ -214,3 +290,40 @@
To Attend this Event
To Register to attend, send email here with a subject line of "I plan to attend the NetFPGA tutorial" and a message that includes your name, title, organisation, and contact information. For accomodations, rooms can be booked at hotels near UNSW
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
@@ -31,7 +107,7 @@
Abstract
Background
-
Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This week-long summercamp extends the material presented at the NetFPGA tutorials. Participants will be able to take home their NetFPGA systems at the end of the week-long camp.
+
Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This week-long summercamp extends the material presented at the NetFPGA tutorials. Participants will be able to take home their NetFPGA systems at the end of the week-long camp.
Building Gigabit-rate Routers with the NetFPGA at the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
Hands-on with the NetFPGA to build a Gigabit-rate Router
Abstract
-
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
This full-day hands-on tutorial will be held in a classroom or laboratory equipped with ten PCs with NetFPGA hardware on Sunday, March 21, 2010.
@@ -32,7 +108,7 @@
Background
-
Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This full-day tutorial extends the material presented at previous NetFPGA Turorials from 2007-2009 (FPL 2009, SIGCOMM 2008, Hot Interconnects 2007, SIGMETRICS 2007). Information about previous events as well as a description of the NetFPGA Platform are available on-line from the NetFPGA homepage.
+
Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This full-day tutorial extends the material presented at previous NetFPGA Turorials from 2007-2009 (FPL 2009, SIGCOMM 2008, Hot Interconnects 2007, SIGMETRICS 2007). Information about previous events as well as a description of the NetFPGA Platform are available on-line from the NetFPGA homepage.
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
The NetFPGA is a open platform enabling researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Protocol (IP) routers using hardware rather than software. The platform can be used by researchers to protype advanced services for next-generation networks
+
The NetFPGA is a open platform enabling researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Protocol (IP) routers using hardware rather than software. The platform can be used by researchers to protype advanced services for next-generation networks
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, attendees will learn about the NetFPGA platform and and how it can be used. We will demonstrate the use of the reference router to dynamically re-route traffic using PW-OSPF with streaming video traffic. We will also show how we can extend existing designs to experiment with buffer sizes.
@@ -134,3 +210,40 @@
Registration
Students must email a copy of their Student ID to gocoving@stanford.edu: Register here to attend
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
+
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
@@ -34,17 +110,17 @@
Background
-
Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This week-long summercamp extends the material presented at the shorter workshop events.
+
Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This week-long summercamp extends the material presented at the shorter workshop events.
+
+
+
+
+
+
+
+
+
+
+
diff --git a/_posts/.DS_Store b/_posts/.DS_Store
deleted file mode 100644
index 0177be2..0000000
Binary files a/_posts/.DS_Store and /dev/null differ
diff --git a/_posts/ecosystem/2021-07-15-NetFPGA.md b/_posts/ecosystem/2021-07-15-NetFPGA.md
deleted file mode 100644
index c83318f..0000000
--- a/_posts/ecosystem/2021-07-15-NetFPGA.md
+++ /dev/null
@@ -1,27 +0,0 @@
----
-title: NetFPGA
-date: 2021-07-15
-posttype: ecosystem
-type: product
-category:
-description: A line-rate, flexible, and open platform for research
-organisation: NetFPGA
-organisation-logo: ./assets/images/thumbnail.png
-organisation-type: academic
-product-repo: https://github.com/NetFPGA/NetFPGA-public
-product-site: ./index.html
-product-image: ./assets/images/Boards/NetFPGA-SUME.jpg
-primary-contact-name: Andrew Moore
-primary-contact-email: enquiries@netfpga.org
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
-target-platform1: NetFPGA-1G
-target-platform2: NetFPGA-10G
-target-platform3: NetFPGA-CML
-target-platform4: NetFPGA-SUME
-target-platform5: NetFPGA-PLUS
----
diff --git a/_posts/ecosystem/2021-07-16-IIsy.md b/_posts/ecosystem/2021-07-16-IIsy.md
deleted file mode 100644
index 49bf7f9..0000000
--- a/_posts/ecosystem/2021-07-16-IIsy.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: IIsy
-date: 2021-07-16
-posttype: ecosystem
-type: other
-category:
-description:
-organisation:
-organisation-logo:
-organisation-type:
-product-repo: https://github.com/ox-computing/IIsy
-product-site:
-primary-contact-name:
-primary-contact-email:
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
----
diff --git a/_posts/ecosystem/2021-07-16-In-Network-Computing-on-Demand.md b/_posts/ecosystem/2021-07-16-In-Network-Computing-on-Demand.md
deleted file mode 100644
index aeb8557..0000000
--- a/_posts/ecosystem/2021-07-16-In-Network-Computing-on-Demand.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: In Network Computing on Demand
-date: 2021-07-16
-posttype: ecosystem
-type: other
-category:
-description:
-organisation:
-organisation-logo:
-organisation-type:
-product-repo: https://github.com/cucl-srg/INC-ondemand
-product-site:
-primary-contact-name:
-primary-contact-email:
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
----
diff --git a/_posts/ecosystem/2021-07-16-MTPSA.md b/_posts/ecosystem/2021-07-16-MTPSA.md
deleted file mode 100644
index 2201ca8..0000000
--- a/_posts/ecosystem/2021-07-16-MTPSA.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: MTPSA
-date: 2021-07-16
-posttype: ecosystem
-type: other
-category:
-description:
-organisation:
-organisation-logo:
-organisation-type:
-product-repo: https://github.com/mtpsa/
-product-site:
-primary-contact-name:
-primary-contact-email:
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
----
diff --git a/_posts/ecosystem/2021-07-16-OSNT.md b/_posts/ecosystem/2021-07-16-OSNT.md
deleted file mode 100644
index c608f5e..0000000
--- a/_posts/ecosystem/2021-07-16-OSNT.md
+++ /dev/null
@@ -1,23 +0,0 @@
----
-title: OSNT
-date: 2021-07-16
-posttype: ecosystem
-type: other
-category:
-description:
-organisation: OSNT
-organisation-logo:
-organisation-type: academic
-product-repo: https://github.com/NetFPGA/OSNT-SUME-live
-product-site: https://osnt.org/
-primary-contact-name:
-primary-contact-email:
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
-target-platform1: NetFPGA-SUME
-target-platform2: NetFPGA-10G
----
diff --git a/_posts/ecosystem/2021-07-16-P4DNS.md b/_posts/ecosystem/2021-07-16-P4DNS.md
deleted file mode 100644
index 2ce5dce..0000000
--- a/_posts/ecosystem/2021-07-16-P4DNS.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: P4DNS
-date: 2021-07-16
-posttype: ecosystem
-type: other
-category:
-description:
-organisation:
-organisation-logo:
-organisation-type:
-product-repo: https://github.com/cucl-srg/P4DNS
-product-site:
-primary-contact-name:
-primary-contact-email:
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
----
diff --git a/_posts/ecosystem/2021-07-16-PTA.md b/_posts/ecosystem/2021-07-16-PTA.md
deleted file mode 100644
index f9b54b1..0000000
--- a/_posts/ecosystem/2021-07-16-PTA.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: PTA
-date: 2021-07-16
-posttype: ecosystem
-type: other
-category:
-description:
-organisation:
-organisation-logo:
-organisation-type:
-product-repo: https://github.com/pta-project-repo/pta-artifacts
-product-site:
-primary-contact-name:
-primary-contact-email:
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
----
diff --git a/_posts/ecosystem/adding-to-javascript.md b/_posts/ecosystem/adding-to-javascript.md
deleted file mode 100644
index 3eaa00c..0000000
--- a/_posts/ecosystem/adding-to-javascript.md
+++ /dev/null
@@ -1,44 +0,0 @@
-# Adding to the JavaScript
-
-This document directly relates to [Filter-script.js](/assets/js/filter-script.js)
-
-## Explanation of each function
-
-- w3AddClass: This is the function that adds the class to the html elements.
-
-- w3RemoveClass: This is the function that removes the class from the html elements.
-
-*both w3AddClass and w3RemoveClass were taken from an example on w3schools*
-
-- hasClass: This is a function that checks to see if the array that it's passed contains the element that it's passed.
-
-- evaluateCard: This is a function that evaluates whether or not the card has one of the attributes and returns an array of booleans for each of the attributes that have a correlating button checked.
-
-- evaluateButtons: This is a function that returns an array of booleans for if a button is checked or not.
-
-- evaluation: This is a function that checks to see if the elements of the passed arrays are equal to 1, but if none of the buttons are pressed then it returns *true*.
-
-- lineBreakRemove: This is a function that removes the line break character from the last class on a card. The line break character has been introduced by the fact that the filter classes are part of an include.
-
-- buttonClicked: This is the main function that is called when a button is clicked on. It removes the class 'show' from all the cards and then runs through the buttonEvaluation before running through all the cards and evaluating them. If the comparison between the button Arrays and the card Arrays all come back as true then the cards then have the 'show' class added back to them.
-
-## Adding new buttons
-
-To add new buttons to the ecosystem filter system make sure the relative button has been added to [Ecosystem-buttons.html](/_includes/ecosystem-buttons.html). If you haven't please make sure to read through the [README.md](/README.md).
-
-## Adding new organisations, organisation types, product types and target platforms
-
-Please make sure to add an if statement like the ones already there in the relevant section of the evaluateCard function:
-
-- organisations go under the organisations comment
-- organisation types go under the organisation types comment
-- product types go under the product types comment
-- target platforms go under the target platforms comment
-
-with the class that is assigned in [ecosystem-filter-classes.html](/_includes/ecosystem-filter-classes.html), the class naming will be very similar to the existing classes if any help is needed with that.
-
-Then make sure to update the array so that the numbers aren't overwritten and that there are the same number of classes as buttons.
-
-Then in buttonClicked on lines 171 - 174 make sure to update the numbers of the parts of the buttonScore array and the postScore array that are being passed through to the evaluation function.
-
-**It is Important to make sure that the order of the buttons is the same as the order of the classes**
diff --git a/_posts/ecosystem/example-ecosystem.md b/_posts/ecosystem/example-ecosystem.md
deleted file mode 100644
index a5de604..0000000
--- a/_posts/ecosystem/example-ecosystem.md
+++ /dev/null
@@ -1,75 +0,0 @@
----
-title: example
-date: 0001-01-01
-posttype: ecosystem
-type: product
-category: software
-description: this is an example
-organisation: NetFPGA
-organisation-logo: ./assets/images/thumbnail.png
-organisation-type: academic
-product-repo: https://github.com/NetFPGA/NetFPGA-public
-product-site: https://netfpga.org
-product-image: ./assets/images/Boards/NetFPGA-SUME.jpg
-primary-contact-name: Andrew Moore
-primary-contact-email: enquiries@netfpga.org
-secondary-contact-name:
-secondary-contact-email:
-seller:
-seller-url:
-seller-email:
-seller-phone:
-target-platform1-5: PLUS
----
-
-title: The name for the product/Project/service
-
-date: the date it was added to the site
-
-posttype: used for the ecosystem cards to show up on the ecosystem page not the news and events page
-
-type: whether it is a product/project/service
-
-category: what kind of product/project/service it is
-
-description: A description of the product/project/service
-
-organisation: The name of the organisation
-
-organisation-logo: the url to the organisation's logo
-
-organisation-type: The type of organisation it is (Academic, Non-profit or Vendor)
-
-product-repo: the link to the product/project/service's public repo
-
-product-site: the link to the product/project/service's website
-
-product-image: if provided an image of the product
-
-primary-contact-name: The name provided from the submission form
-
-primary-contact-email: The email provided from the submission form
-
-secondary-contact-name: If provided from the submission form
-
-secondary-contact-email: If provided from the submission form
-
-seller: The name of the seller of the product
-
-seller-url: The link to the seller's website, if provided
-
-seller-email: The email of the seller, if provided
-
-seller-phone: The phone number of the seller, if provided
-
-target-platform1: the main NetFPGA platform the product is designed for/uses
-
-target-platform2: The secondary NetFPGA platform the product is designed for/uses
-
-target-platform3: The tertiary NetFPGA platform the product is designed for/uses
-
-target-platform4: The quarternary NetFPGA platform the product is designed for/uses
-
-target-platform5: The quinary NetFPGA platform the product is designed for/uses
-
-***If adding new organisations, organisation types, product types, target platforms please make sure to check (adding-to-javascript.md)[/_posts/ecosystem/adding-to-javascript.md]***
diff --git a/_posts/news-and-events/2007-06-12-ACM-SigMetrics-2007.md b/_posts/news-and-events/2007-06-12-ACM-SigMetrics-2007.md
deleted file mode 100644
index b0ef827..0000000
--- a/_posts/news-and-events/2007-06-12-ACM-SigMetrics-2007.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: ACM SigMetrics 2007
-date: 2007-06-12
-eventdate: 2007-06-12
-eoldate: 2008-06-12
-category: events
-posttype: news-and-events
-location: San Diego, CA
-presenter: ACM SigMetrics 2007; International Conference on Measurement and Modeling of Computer Systems
-website: http://www.cs.cmu.edu/~sigm07/workshops.html
-titlelink: http://www.cs.cmu.edu/~sigm07/workshops.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPROHp0UHF1QVdJWnc)
diff --git a/_posts/news-and-events/2007-08-24-Hot-Interconnects.md b/_posts/news-and-events/2007-08-24-Hot-Interconnects.md
deleted file mode 100644
index 86437d9..0000000
--- a/_posts/news-and-events/2007-08-24-Hot-Interconnects.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Hot Interconnects
-date: 2007-08-24
-eventdate: 2007-08-24
-eoldate: 2008-08-24
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: IEEE Hot Interconnects (HotI)
-website: /_pages/2007-08-24-Hot-Interconnects-Tutorial.html
-titlelink: /_pages/2007-08-24-Hot-Interconnects-Tutorial.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slide:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRM1lCT1lMR2N4Z3M) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRVHVhcWNNenhMcWs)
diff --git a/_posts/news-and-events/2008-02-06-Sydney-Australia.md b/_posts/news-and-events/2008-02-06-Sydney-Australia.md
deleted file mode 100644
index 94ebc13..0000000
--- a/_posts/news-and-events/2008-02-06-Sydney-Australia.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Sydney, Australia
-date: 2008-02-06
-eventdate: 2008-02-06
-eoldate: 2009-02-06
-category: events
-posttype: news-and-events
-location: University of New South Wales
-presenter:
-website: /_pages/2008-02-06-NetFPGA-Sydney-Tutorial.html
-titlelink: /_pages/2008-02-06-NetFPGA-Sydney-Tutorial.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPROTJkNmZmcGp2VWs) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPROTJkNmZmcGp2VWs)
diff --git a/_posts/news-and-events/2008-03-31-EuroSys-2008.md b/_posts/news-and-events/2008-03-31-EuroSys-2008.md
deleted file mode 100644
index ab94b79..0000000
--- a/_posts/news-and-events/2008-03-31-EuroSys-2008.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: EuroSys 2008
-date: 2008-03-31
-eventdate: 2008-03-31
-eoldate: 2009-03-31
-category: events
-posttype: news-and-events
-location: Glasgow, Scotland
-presenter: Andrew Moore of the University of Cambridge
-website: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/eurosys-march-2008/index.html
-titlelink: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/eurosys-march-2008/index.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRZllFMzVjWTJJNDA) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRWkk2SUNVQ1Y4NVE)
diff --git a/_posts/news-and-events/2008-04-23-Beijing-China.md b/_posts/news-and-events/2008-04-23-Beijing-China.md
deleted file mode 100644
index b147fb2..0000000
--- a/_posts/news-and-events/2008-04-23-Beijing-China.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Beijing, China
-date: 2008-04-23
-eventdate: 2008-04-23
-eoldate: 2009-04-23
-category: events
-posttype: news-and-events
-location: Beijing Jiaotong University
-presenter: Kevin Xie and Walkie Que of Xilinx University Program in China and Lian Shu (Vero) Zheng of Huawei
-website: /_pages/2008-04-23-NetFPGA-Beijing-Tutorial.html
-titlelink: /_pages/2008-04-23-NetFPGA-Beijing-Tutorial.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPReGRmbWQwQUhqWlE) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRWkk2SUNVQ1Y4NVE)
diff --git a/_posts/news-and-events/2008-05-15-Bangalore-India.md b/_posts/news-and-events/2008-05-15-Bangalore-India.md
deleted file mode 100644
index f42e730..0000000
--- a/_posts/news-and-events/2008-05-15-Bangalore-India.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Bangalore, India
-date: 2008-05-15
-eventdate: 2008-05-15
-eoldate: 2009-05-15
-category: events
-posttype: news-and-events
-location: Indian Institute of Science (IISc)
-presenter: Veena Kumar of Xilinx University Program of India
-website: /_pages/2008-05-15-NetFPGA-Bangalore-Tutorial.html
-titlelink: /_pages/2008-05-15-NetFPGA-Bangalore-Tutorial.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRRmVwN1FaTFRoalk) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRS1lLNzdWdy0zY28)
diff --git a/_posts/news-and-events/2008-08-04-Summer-Camp-2008.md b/_posts/news-and-events/2008-08-04-Summer-Camp-2008.md
deleted file mode 100644
index 0e2b46f..0000000
--- a/_posts/news-and-events/2008-08-04-Summer-Camp-2008.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Summer Camp 2008
-date: 2008-08-04
-eventdate: 2008-08-04
-eoldate: 2009-08-04
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: Stanford NetFPGA Group
-website: /_pages/2008-08-04-NetFPGA-Summer-Camp-2008.html
-titlelink: /_pages/2008-08-04-NetFPGA-Summer-Camp-2008.html
----
-
-Goal: Hands-on, week-long event for professors and students
diff --git a/_posts/news-and-events/2008-08-17-SIGCOMM-2008.md b/_posts/news-and-events/2008-08-17-SIGCOMM-2008.md
deleted file mode 100644
index 2b3a5cb..0000000
--- a/_posts/news-and-events/2008-08-17-SIGCOMM-2008.md
+++ /dev/null
@@ -1,12 +0,0 @@
----
-title: SIGCOMM 2008
-date: 2008-08-17
-eventdate: 2008-08-17
-eoldate: 2009-08-17
-category: events
-posttype: news-and-events
-location: Seattle, WA, USA
-presenter:
-website: /_pages/2008-08-17-SIGCOMM-2008-Tutorial.html
-titlelink: /_pages/2008-08-17-SIGCOMM-2008-Tutorial.html
----
diff --git a/_posts/news-and-events/2008-08-21-NetFPGA-Demo-wins-2nd-place-at-SIGCOMM.md b/_posts/news-and-events/2008-08-21-NetFPGA-Demo-wins-2nd-place-at-SIGCOMM.md
deleted file mode 100644
index 14889e6..0000000
--- a/_posts/news-and-events/2008-08-21-NetFPGA-Demo-wins-2nd-place-at-SIGCOMM.md
+++ /dev/null
@@ -1,10 +0,0 @@
----
-title: NetFPGA Demo wins 2nd place at SIGCOMM
-date: 2008-08-21
-eventdate: 2008-08-21
-eoldate: 2010-08-21
-category: news
-posttype: news-and-events
----
-
-Congratulations to Neda and the rest of the NetFPGA team for the successful demonstration of the NetFPGA at the SIGCOMM 2008 conference. The demonstration was second only to the OpenFlow demo, which was awarded as the best demonstration at the conference. The NetFPGA demo, Programmable Routers in Real Networks, modulated the size of a NetFPGA routers packet buffer deployed within the Internet2 to study the effect of TCP throughput. Live data from the experiment was charted on a Java GUI to confirm that the model predicteding the buffer size of RTT*C/Sqrt(N) provides an upper bound on the buffer size needed to obtain full throughput in the network.
diff --git a/_posts/news-and-events/2008-09-05-Bruno-Czech-Republic.md b/_posts/news-and-events/2008-09-05-Bruno-Czech-Republic.md
deleted file mode 100644
index 9a687a8..0000000
--- a/_posts/news-and-events/2008-09-05-Bruno-Czech-Republic.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Bruno, Czech Republic
-date: 2008-09-05
-eventdate: 2008-09-05
-eoldate: 2009-09-05
-category: events
-posttype: news-and-events
-location: Brno University
-presenter: Jan Korenek, Martin Zadnik, Jiri Novotny
-website: http://www.liberouter.org/
-titlelink: http://www.liberouter.org/
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRN3RETUp4ODRHSGM) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRNkNCcnhXcmM4Z28)
diff --git a/_posts/news-and-events/2008-09-16-Cambridge-UK.md b/_posts/news-and-events/2008-09-16-Cambridge-UK.md
deleted file mode 100644
index b6c1a66..0000000
--- a/_posts/news-and-events/2008-09-16-Cambridge-UK.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: Cambridge, UK
-date: 2008-09-16
-eventdate: 2008-09-16
-eoldate: 2009-09-16
-category: events
-posttype: news-and-events
-location: University of Cambridge
-presenter: Andrew Moore and the Cambridge NetFPGA Group
-website: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2008/index.html
-titlelink: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2008/index.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2008/NetFPGA-Day1-Cambridge-v2.pdf) [PowerPoint](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2008/NetFPGA-Day1-Cambridge-v2.ppt)
-- Day 2: [PDF](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2008/NetFPGA-Day2-Cambridge-v2.pdf) [PowerPoint](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2008/NetFPGA-Day2-Cambridge-v2.ppt)
diff --git a/_posts/news-and-events/2009-02-25-Seoul-South-Korea.md b/_posts/news-and-events/2009-02-25-Seoul-South-Korea.md
deleted file mode 100644
index f1c744c..0000000
--- a/_posts/news-and-events/2009-02-25-Seoul-South-Korea.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Seoul, South Korea
-date: 2009-02-25
-eventdate: 2009-02-25
-eoldate: 2010-02-25
-category: events
-posttype: news-and-events
-location: Seoul National University
-presenter: Sue B. Moon (KAIST) & Dae Young KIM
-website: https://en.snu.ac.kr/index.html
-titlelink: https://en.snu.ac.kr/index.html
----
-
-Goal: Hands-on, One-day tutorial
diff --git a/_posts/news-and-events/2009-08-13-1st-North-American-NetFPGA-Developers-Workshop.md b/_posts/news-and-events/2009-08-13-1st-North-American-NetFPGA-Developers-Workshop.md
deleted file mode 100644
index add529b..0000000
--- a/_posts/news-and-events/2009-08-13-1st-North-American-NetFPGA-Developers-Workshop.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: 1st North American NetFPGA Developer's Workshop
-date: 2009-08-13
-eventdate: 2009-08-13
-eoldate: 2010-08-13
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: John Lockwood (Stanford) and Andrew Moore (Cambridge University)
-website: /_pages/2009-08-13-NetFPGA-Developers-Worshop-2009.html
-titlelink: /_pages/2009-08-13-NetFPGA-Developers-Worshop-2009.html
----
-
-Goal: Present and demonstrate new contributed projects
diff --git a/_posts/news-and-events/2009-09-03-FPL-19.md b/_posts/news-and-events/2009-09-03-FPL-19.md
deleted file mode 100644
index 6345579..0000000
--- a/_posts/news-and-events/2009-09-03-FPL-19.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: FPL 19
-date: 2009-09-03
-eventdate: 2009-09-03
-eoldate: 2010-09-03
-category: events
-posttype: news-and-events
-location: Brno University of Technology, Lab Room L314
-presenter:
-website: http://www.liberouter.org/
-titlelink: http://www.liberouter.org/
----
-
-Goal: Hands-on, Two-day tutorial
diff --git a/_posts/news-and-events/2010-02-09-NetFPGA-Design-Challenge-2010.md b/_posts/news-and-events/2010-02-09-NetFPGA-Design-Challenge-2010.md
deleted file mode 100644
index 914898f..0000000
--- a/_posts/news-and-events/2010-02-09-NetFPGA-Design-Challenge-2010.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: NetFPGA Design Challenge 2010
-date: 2010-02-09
-eventdate: 2010-02-09
-eoldate: 2011-02-09
-category: events
-posttype: news-and-events
-location:
-presenter:
-website:
-titlelink:
----
-
-Ends: June 1, 2010
diff --git a/_posts/news-and-events/2010-03-15-Spring-Camp-2010.md b/_posts/news-and-events/2010-03-15-Spring-Camp-2010.md
deleted file mode 100644
index 64f772e..0000000
--- a/_posts/news-and-events/2010-03-15-Spring-Camp-2010.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: Spring Camp 2010
-date: 2010-03-15
-eventdate: 2010-03-15
-eoldate: 2011-03-15
-category: events
-posttype: news-and-events
-location: Cambridge, UK
-presenter: Andrew Moore and the Cambridge NetFPGA Group
-website: http://bit.ly/6zvcw6
-titlelink: http://bit.ly/6zvcw6
----
-
-Goal: Hands-on, extended week-long event for professors and students
-
-Slides:
-- Day 1: [PDF](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-march-2010/NetFPGA-spring10-Day1.pdf) [PowerPoint](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-march-2010/NetFPGA-spring10-Day1.ppt)
-- Day 2: [PDF](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-march-2010/NetFPGA-spring10-Day2.pdf) [PowerPoint](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-march-2010/NetFPGA-spring10-Day2.ppt)
diff --git a/_posts/news-and-events/2010-03-21-IETF-77.md b/_posts/news-and-events/2010-03-21-IETF-77.md
deleted file mode 100644
index 4523c4b..0000000
--- a/_posts/news-and-events/2010-03-21-IETF-77.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: IETF 77
-date: 2010-03-21
-eventdate: 2010-03-21
-eoldate: 2011-03-21
-category: events
-posttype: news-and-events
-location: Anaheim, CA, USA
-presenter:
-website: /_pages/2010-03-21-IETF-Tutorial-2010-Anaheim.html
-titlelink: /_pages/2010-03-21-IETF-Tutorial-2010-Anaheim.html
----
-
-Goal: Hands-on, One-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRRG9FTkZDenZXdk0) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRbnVTd01LYWp3RXc)
diff --git a/_posts/news-and-events/2010-03-29-NetFPGA-Design-Contest-2010.md b/_posts/news-and-events/2010-03-29-NetFPGA-Design-Contest-2010.md
deleted file mode 100644
index 8621b56..0000000
--- a/_posts/news-and-events/2010-03-29-NetFPGA-Design-Contest-2010.md
+++ /dev/null
@@ -1,16 +0,0 @@
----
-title: NetFPGA Design Contest 2010
-date: 2010-03-29
-eventdate: 2010-03-29
-eoldate: 2012-03-29
-category: news
-posttype: news-and-events
----
-
-The Stanford NetFPGA team is pleased to announce the 2010 NetFPGA Design Contest!
-
-The NetFPGA is an open platform developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used by researchers to prototyped advanced services for next-generation networks. By using Field Programmable Gateway Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. The contest is split into two challenges. Teams can participate in either or both challenges. The design teams have 120 days to produce a working implementation employing any HW and SW design methodology and targeting the NetFPGA development platform. The contest begings Feb 9th, 2010.
-
-Challenge 1: The Best Network Tester/Packet Capture system There are a small number of very expensive packet generator and capture systems on the market, used for testing networks and network equipment. The goal of this design is to provide a usable, powerful and open-source alternative for use by universities and organizations unable to afford such expensive equipment.
-
-Challenge 2: The Best Overall Network Design System The goal is to design and implement a novel design on the NetFPGA system. Use your imagination to devise a new use case for the NetFPGA. We are looking for solutions utilizing the NetFPGA cards that perform significant networking functionality. The 1st place team will receive: $1,000 cash award, two NetFPGA-1G cards (or one NetFPGA-10G cards when they become available), and the right to choose a school to receive 5 new NetFPGA-1G cards. Up to two team members will receive an expenses-paid trip (flight, hotel and registration) to come and present your design at a NetFPGA Developers Conference. The 2nd place team will receive $600 cash award. The 3rd place team will receive $400 cash award.
diff --git a/_posts/news-and-events/2010-03-29-NetFPGA-Kentucky-Tutorial.md b/_posts/news-and-events/2010-03-29-NetFPGA-Kentucky-Tutorial.md
deleted file mode 100644
index 5718cca..0000000
--- a/_posts/news-and-events/2010-03-29-NetFPGA-Kentucky-Tutorial.md
+++ /dev/null
@@ -1,16 +0,0 @@
----
-title: NetFPGA Kentucky Tutorial
-date: 2010-03-29
-eventdate: 2010-03-29
-eoldate: 2012-03-29
-category: news
-posttype: news-and-events
----
-
-We are pleased to announce an upcoming NetFPGA tutorial in Lexington, KY on March 21, 2010.
-
-During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
-
-Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required.
-
-Details about this event and registration information are posted on-line.
diff --git a/_posts/news-and-events/2010-04-14-Kentucky-USA.md b/_posts/news-and-events/2010-04-14-Kentucky-USA.md
deleted file mode 100644
index 60c1041..0000000
--- a/_posts/news-and-events/2010-04-14-Kentucky-USA.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Kentucky, USA
-date: 2010-04-14
-eventdate: 2010-04-14
-eoldate: 2011-04-14
-category: events
-posttype: news-and-events
-location: University of Kentucky
-presenter:
-website: http://www.netlab.uky.edu/
-titlelink: http://www.netlab.uky.edu/
----
-
-Goal: Hands-on, Two-day tutorial
diff --git a/_posts/news-and-events/2010-05-15-Beijing-China.md b/_posts/news-and-events/2010-05-15-Beijing-China.md
deleted file mode 100644
index 7e03f6e..0000000
--- a/_posts/news-and-events/2010-05-15-Beijing-China.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: Beijing, China
-date: 2010-05-15
-eventdate: 2010-05-15
-eoldate: 2011-05-15
-category: events
-posttype: news-and-events
-location: Tsinghua University
-presenter:
-website: http://netarchlab.tsinghua.edu.cn/
-titlelink: http://netarchlab.tsinghua.edu.cn/
----
-
-Goal: Hands-on, Two day tutorial
-
-Slides:
-- [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRS1g0bkhWYnNBblk) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRa3lScEdDNjh0X00)
-- [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRQjdNcHFKeFF0RGs) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRNTJWSEpiaU5Fak0)
diff --git a/_posts/news-and-events/2010-06-02-Delaware-USA.md b/_posts/news-and-events/2010-06-02-Delaware-USA.md
deleted file mode 100644
index a2078ab..0000000
--- a/_posts/news-and-events/2010-06-02-Delaware-USA.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Delaware, USA
-date: 2010-06-02
-eventdate: 2010-06-02
-eoldate: 2011-06-02
-category: events
-posttype: news-and-events
-location: University of Delaware
-presenter:
-website: http://www.cis.udel.edu/
-titlelink: http://www.cis.udel.edu/
----
-
-Goal: Hands-on, Two-day tutorial
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRcHkxbUkwdThlWGM) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRdmJCNEFYYUpNYlk)
-- Day 2: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRZWVIejRoek1QeHM) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRU0tfNXBkaFBJcVk)
diff --git a/_posts/news-and-events/2010-06-14-1st-Asian-NetFPGA-Developers-Workshop.md b/_posts/news-and-events/2010-06-14-1st-Asian-NetFPGA-Developers-Workshop.md
deleted file mode 100644
index 3a5ec42..0000000
--- a/_posts/news-and-events/2010-06-14-1st-Asian-NetFPGA-Developers-Workshop.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: 1st Asian NetFPGA Developer's Workshop
-date: 2010-06-14
-eventdate: 2010-06-14
-eoldate: 2011-06-14
-category: events
-posttype: news-and-events
-location: KAIST, Daejeon, Korea
-presenter: John Lockwood (Algo-Logic System) and Seung-Joon Seok (Kyungnam University)
-website:
-titlelink:
----
-
-Goal: Present and demonstrate new contributed projects
diff --git a/_posts/news-and-events/2010-07-02-1st-European-NetFPGA-Developers-Workshop.md b/_posts/news-and-events/2010-07-02-1st-European-NetFPGA-Developers-Workshop.md
deleted file mode 100644
index 1974793..0000000
--- a/_posts/news-and-events/2010-07-02-1st-European-NetFPGA-Developers-Workshop.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: 1st European NetFPGA Developer's Workshop
-date: 2010-07-02
-eventdate: 2010-07-02
-eoldate: 2011-07-02
-category: events
-posttype: news-and-events
-location: Cambridge, UK
-presenter: Andrew Moore (Cambridge University) and Satnam Singh (Microsoft Research)
-website: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/eurodev2010/
-titlelink: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/eurodev2010/
----
-
-Goal: Present and demonstrate new contributed projects
diff --git a/_posts/news-and-events/2010-07-02-NetFPGA-Summer-Camp.md b/_posts/news-and-events/2010-07-02-NetFPGA-Summer-Camp.md
deleted file mode 100644
index 5138528..0000000
--- a/_posts/news-and-events/2010-07-02-NetFPGA-Summer-Camp.md
+++ /dev/null
@@ -1,12 +0,0 @@
----
-title: NetFPGA Summer Camp
-date: 2010-07-02
-eventdate: 2010-07-02
-eoldate: 2012-07-02
-category: news
-posttype: news-and-events
----
-
-[NetFPGA Summer Camp](/_pages/2010-07-02-NetFPGA-Summer-Camp-2010.html) at Stanford University will be August 9th-13th 2010. Registration deadline: June 15th
-
-Register at: [Registration Site](http://www.certain.com/system/profile/form/index.cfm?PKformID=0x871455fbaf) A limited number of Scholarships are available for students or instructors from schools unable to cover registration and hotel expenses. To apply for a scholarship, please fill in the [application](http://spreadsheets.google.com/viewform?formkey=dC16aGJXdGZhTEtWeDY5ZGV2Y0oyMVE6MQ).
diff --git a/_posts/news-and-events/2010-08-09-Summer-Camp-2010.md b/_posts/news-and-events/2010-08-09-Summer-Camp-2010.md
deleted file mode 100644
index 00bf6c2..0000000
--- a/_posts/news-and-events/2010-08-09-Summer-Camp-2010.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Summer Camp 2010
-date: 2010-08-09
-eventdate: 2010-08-09
-eoldate: 2011-08-09
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: Stanford NetFPGA Group
-website: /_pages/2010-07-02-NetFPGA-Summer-Camp-2010.html
-titlelink: /_pages/2010-07-02-NetFPGA-Summer-Camp-2010.html
----
-
-Goal: Hands-on, extended week-long event for professors
diff --git a/_posts/news-and-events/2010-08-12-2nd-North-American-NetFPGA-Developers-Workshop.md b/_posts/news-and-events/2010-08-12-2nd-North-American-NetFPGA-Developers-Workshop.md
deleted file mode 100644
index 28c9390..0000000
--- a/_posts/news-and-events/2010-08-12-2nd-North-American-NetFPGA-Developers-Workshop.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: 2nd North American NetFPGA Developer's Workshop
-date: 2010-08-12
-eventdate: 2010-08-12
-eoldate: 2011-08-12
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: Yashar Ganjali (University of Toronto) and Andrew Moore (Cambridge University)
-website: /_pages/2010-09-12-2nd-North-American-NetFPGA-Developers-Workshop.html
-titlelink: /_pages/2010-09-12-2nd-North-American-NetFPGA-Developers-Workshop.html
----
-
-Goal: Present and demonstrate new contributed projects
diff --git a/_posts/news-and-events/2010-09-16-Crete-Greece.md b/_posts/news-and-events/2010-09-16-Crete-Greece.md
deleted file mode 100644
index 3a535e9..0000000
--- a/_posts/news-and-events/2010-09-16-Crete-Greece.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: Crete, Greece
-date: 2010-09-16
-eventdate: 2010-09-16
-eoldate: 2011-09-16
-category: events
-posttype: news-and-events
-location: Crete, Greece
-presenter: Manolis Katevenis and FORTH (Foundation for Research & Technology)
-website: https://projects.ics.forth.gr/netfpga/
-titlelink: https://www.forth.gr
----
-
-Goal: Hands-on, Two-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRdUphR1BJNGNNU1E) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRUzM4TXpreVB4bVU)
-- Day 2: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRMDVVdGJWSnRyUzg) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRQWxDWU9qcGp3ZDQ)
diff --git a/_posts/news-and-events/2010-11-04-Melbourne-Australia.md b/_posts/news-and-events/2010-11-04-Melbourne-Australia.md
deleted file mode 100644
index e7d400e..0000000
--- a/_posts/news-and-events/2010-11-04-Melbourne-Australia.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: Melbourne, Australia
-date: 2010-11-04
-eventdate: 2010-11-04
-eoldate: 2011-11-04
-category: events
-posttype: news-and-events
-location: Melbourne, Australia
-presenter:
-website: https://electrical.eng.unimelb.edu.au
-titlelink: https://electrical.eng.unimelb.edu.au
----
-
-Goal: Hands-on, Two-day Tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRUDNRUTNyZnRtTzg) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRdlF2RXUtWkRSY1E)
-- Day 2: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRelZRVTNUeXZIRVU) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRNmVkLU1lRkJDWkU)
diff --git a/_posts/news-and-events/2010-11-06-Beijing-China.md b/_posts/news-and-events/2010-11-06-Beijing-China.md
deleted file mode 100644
index 4b942fe..0000000
--- a/_posts/news-and-events/2010-11-06-Beijing-China.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Beijing, China
-date: 2010-11-06
-eventdate: 2010-11-04
-eoldate: 2011-11-04
-category: events
-posttype: news-and-events
-location: Tsinghua University, Beijing, China
-presenter:
-website: http://netarchlab.tsinghua.edu.cn/
-titlelink: http://netarchlab.tsinghua.edu.cn/
----
-
-Goals: Hands-on, Two-day Tutorial
diff --git a/_posts/news-and-events/2011-01-21-NetFPGA-Release-2-2-0.md b/_posts/news-and-events/2011-01-21-NetFPGA-Release-2-2-0.md
deleted file mode 100644
index 4c7d26a..0000000
--- a/_posts/news-and-events/2011-01-21-NetFPGA-Release-2-2-0.md
+++ /dev/null
@@ -1,32 +0,0 @@
----
-title: NetFPGA 2.2.0 Released
-date: 2011-01-21
-eventdate: 2011-01-21
-eoldate: 2013-01-21
-category: news
-posttype: news-and-events
----
-
-NetFPGA 2.2.0 is released.
-
-Below is a brief description of improvements. Visit the release page to see the entire change log and bug fixes.
-
-Improvements:
-- Gigabit MAC/Tri-mode Ethernet MAC:
- - allow TEMAC to be substituted for Gigabit MAC
- - Switch all reference projects to Gigabit MAC
-- Xen:
- - Driver and tools will now work in a Xen virtualization environment. (See the website for documentation.)
-- crypto_nic:
- - tests updated to reflect library location updates
-- Wireshark:
- - Include plugins for:
- - PWOSPF
- - event_capture
- - Note: These currently do not compile without work from the user
-- Driver:
- - add support for /sys/class/net under Linux 2.6+
-- fetch_mem_models:
- - included a script for fetching the memory models for simulation
-- build system:
- - UCF files provided by modules will be merged.
diff --git a/_posts/news-and-events/2011-03-07-NetFPGA-Summer-camp-2011.md b/_posts/news-and-events/2011-03-07-NetFPGA-Summer-camp-2011.md
deleted file mode 100644
index 2c4dbd5..0000000
--- a/_posts/news-and-events/2011-03-07-NetFPGA-Summer-camp-2011.md
+++ /dev/null
@@ -1,12 +0,0 @@
----
-title: NetFPGA Summer Camp 2011
-date: 2011-03-07
-eventdate: 2011-03-07
-eoldate: 2013-03-07
-category: news
-posttype: news-and-events
----
-
-Mark your calendars. We are planning another NetFPGA Summer Camp this year. The camp will be held at Stanford, August 1st-5th.
-
-More information will be sent as the webpage and registration is set up.
diff --git a/_posts/news-and-events/2011-05-02-NetFPGA-Summer-camp-2011-registration-online.md b/_posts/news-and-events/2011-05-02-NetFPGA-Summer-camp-2011-registration-online.md
deleted file mode 100644
index 0420aef..0000000
--- a/_posts/news-and-events/2011-05-02-NetFPGA-Summer-camp-2011-registration-online.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: NetFPGA Summer Camp 2011 Registration Online
-date: 2011-05-02
-eventdate: 2011-05-02
-eoldate: 2013-05-02
-category: news
-posttype: news-and-events
----
-
-The registration site for the 2011 NetFPGA Summer Camp at Stanford University is now on-line. Summer Camp will be held August 1st-5th.
-
-Register before June 15th for only $250. After June 15th the price will be $350.
-
-As noted at the end of the event [homepage](/_pages/2011-08-01-NetFPGA-Summer-Camp-2011.html), it is now possible to register for the event or apply for a scholarship.
-
-The link to register on-line is [here](http://www.certain.com/system/profile/form/index.cfm?PKformID=0x1089556e8bd).
-
-A limited number of scholarships are also available for students or instructors from schools unable to cover registration and hotel expenses. Award of the scholarships will be based on both merit and need. The application form for the scholarship is available on-line.
diff --git a/_posts/news-and-events/2011-08-01-Summer-Camp-2011.md b/_posts/news-and-events/2011-08-01-Summer-Camp-2011.md
deleted file mode 100644
index 6443b7f..0000000
--- a/_posts/news-and-events/2011-08-01-Summer-Camp-2011.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Summer Camp 2011
-date: 2011-08-01
-eventdate: 2011-08-01
-eoldate: 2012-08-01
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: Stanford NetFPGA Group
-website: /_pages/2011-08-01-NetFPGA-Summer-Camp-2011.html
-titlelink: /_pages/2011-08-01-NetFPGA-Summer-Camp-2011.html
----
-
-Goal: Hands-on, extended week-long event for professors and students
diff --git a/_posts/news-and-events/2011-08-19-Toronto-2011.md b/_posts/news-and-events/2011-08-19-Toronto-2011.md
deleted file mode 100644
index 37eeed7..0000000
--- a/_posts/news-and-events/2011-08-19-Toronto-2011.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Toronto 2011
-date: 2011-08-19
-eventdate: 2011-08-19
-eoldate: 2012-08-19
-category: events
-posttype: news-and-events
-location: Toronto, Canada (Near SIGCOMM)
-presenter: Yashar Ganjali, Andrew Moore and Adam Covington
-website: /_pages/2011-08-19-Toronto-Tutorial-2011.html
-titlelink: /_pages/2011-08-19-Toronto-Tutorial-2011.html
----
-
-Goal: Informational Tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRMjVOMG5xbEJKZjA) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRM3M1d05sbk9sMVU)
diff --git a/_posts/news-and-events/2011-09-01-EU-PURSUIT.md b/_posts/news-and-events/2011-09-01-EU-PURSUIT.md
deleted file mode 100644
index 59fdd91..0000000
--- a/_posts/news-and-events/2011-09-01-EU-PURSUIT.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: EU/PURSUIT
-date: 2011-09-01
-eventdate: 2011-09-01
-eoldate: 2012-09-01
-category: events
-posttype: news-and-events
-location: Cambridge, UK
-presenter: Andrew Moore
-website: http://www.fp7-pursuit.eu/
-titlelink: http://www.fp7-pursuit.eu/
----
-
-Goal: Full-day Tutorial
-
-Slides:
-- Day 1: [PDF](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2011/2011_NetFPGA_Day_tutorial_Cambridge.pdf) [PowerPoint](http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/cambridge-september-2011/2011_NetFPGA_Day_tutorial_Cambridge.ppt)
diff --git a/_posts/news-and-events/2011-11-10-EU-OFELIA.md b/_posts/news-and-events/2011-11-10-EU-OFELIA.md
deleted file mode 100644
index 8047f03..0000000
--- a/_posts/news-and-events/2011-11-10-EU-OFELIA.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: EU/OFELIA
-date: 2011-11-10
-eventdate: 2011-11-10
-eoldate: 2012-11-10
-category: events
-posttype: news-and-events
-location: Berlin, Germany
-presenter: Andrew Moore
-website: http://changeofelia.info.ucl.ac.be/
-titlelink: http://changeofelia.info.ucl.ac.be/
----
-
-Goal: Half-day Introductory Tutorial
diff --git a/_posts/news-and-events/2011-12-05-Tokyo-Japan-near-CoNext.md b/_posts/news-and-events/2011-12-05-Tokyo-Japan-near-CoNext.md
deleted file mode 100644
index 597d7cc..0000000
--- a/_posts/news-and-events/2011-12-05-Tokyo-Japan-near-CoNext.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Tokyo, Japan (near CoNext)
-date: 2011-12-05
-eventdate: 2011-12-05
-eoldate: 2012-12-05
-category: events
-posttype: news-and-events
-location: Tokyo, Japan
-presenter:
-website: /_pages/2011-12-05-Tokyo-Tutorial-2011.html
-titlelink: /_pages/2011-12-05-Tokyo-Tutorial-2011.html
----
-
-Goal: Half-day Introductory Tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRb2dJV3loVi1XcE0) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRa2x3c3lPQ3hleHM)
diff --git a/_posts/news-and-events/2012-03-15-NetFPGA-10G-Public-Beta.md b/_posts/news-and-events/2012-03-15-NetFPGA-10G-Public-Beta.md
deleted file mode 100644
index 15dd0f0..0000000
--- a/_posts/news-and-events/2012-03-15-NetFPGA-10G-Public-Beta.md
+++ /dev/null
@@ -1,22 +0,0 @@
----
-title: NetFPGA 10G Public Beta
-date: 2012-03-15
-eventdate: 2012-03-15
-eoldate: 2014-03-15
-category: news
-posttype: news-and-events
----
-
-We are happy to announce NetFPGA 10G Public Beta. This release is public, meaning open to everyone. There will be limited support while the programme is in Beta.
-
-Register for access [here](10G-reg-form.html).
-
-Project webpage: [http://www.netfpga.org](index.html)
-
-The NetFPGA-10G features include:
-- Xilinx Virtex-5 XC5VTX240
-- Four SFP+ interface (using 16 RocketIO GTX transceivers and 4 PHY devices)
-- Support for both 10Gbps and 1Gbps modes
-- X8 PCI express Gen 2 (5Gbps/lane)
-- Twenty Configurable GTX Serial transceivers (available through two high-speed Samtec connectors)
-- Three x36 QDR II (CY7C1515JV18) - Four x32 RLDRAM II (MT49H16M36HT-25)
diff --git a/_posts/news-and-events/2012-06-15-Sigmetrics-Performance-2012.md b/_posts/news-and-events/2012-06-15-Sigmetrics-Performance-2012.md
deleted file mode 100644
index e17b684..0000000
--- a/_posts/news-and-events/2012-06-15-Sigmetrics-Performance-2012.md
+++ /dev/null
@@ -1,13 +0,0 @@
----
-title: Sigmetrics/Performance 2012
-date: 2012-06-15
-eventdate: 2012-06-15
-eoldate: 2013-06-15
-category: events
-posttype: news-and-events
-location: London, United Kingdom
-presenter: Andrew Moore and the Cambridge NetFPGA Group
-website: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/sigmetrics2012/index.html
-titlelink: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/sigmetrics2012/index.html
----
-Goal: Hands-on, One-day tutorial
diff --git a/_posts/news-and-events/2012-06-18-Indiana-Hands-on-Tutorial-2012.md b/_posts/news-and-events/2012-06-18-Indiana-Hands-on-Tutorial-2012.md
deleted file mode 100644
index 7c91234..0000000
--- a/_posts/news-and-events/2012-06-18-Indiana-Hands-on-Tutorial-2012.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: Indiana Hands-on Tutorial 2012
-date: 2012-06-18
-eventdate: 2012-06-18
-eoldate: 2013-06-18
-category: events
-posttype: news-and-events
-location: Indiana University, Bloomington
-presenter: Adam Covington
-website:
-titlelink: http://www.iub.edu/
----
-
-Goal: Hands-on, Two-day tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRNlhSZHdPcHU1aFk) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRRUcyUHFpcTN2MTQ)
-- Day 2: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRVld2d1VsWDVjaGM) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRRUcyUHFpcTN2MTQ)
diff --git a/_posts/news-and-events/2012-07-30-Summer-Camp-2012.md b/_posts/news-and-events/2012-07-30-Summer-Camp-2012.md
deleted file mode 100644
index 0903806..0000000
--- a/_posts/news-and-events/2012-07-30-Summer-Camp-2012.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: Summer Camp 2012
-date: 2012-07-30
-eventdate: 2012-07-30
-eoldate: 2013-07-30
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: Stanford NetFPGA Group
-website: /_pages/2012-07-30-NetFPGA-Summer-Camp-2012.html
-titlelink: /_pages/2012-07-30-NetFPGA-Summer-Camp-2012.html
----
-
-Goal: Hands-on, extended week-long event for professors and students
-
-Slides:
-- Day 1: [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRUVdSLXlhNXVRT0E)
-- Day 2: [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPRc0lvTXJGYU8zdkk)
diff --git a/_posts/news-and-events/2012-10-10-LATINCOM-2012.md b/_posts/news-and-events/2012-10-10-LATINCOM-2012.md
deleted file mode 100644
index c94775d..0000000
--- a/_posts/news-and-events/2012-10-10-LATINCOM-2012.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: LATINCOM 2012
-date: 2012-10-10
-eventdate: 2012-10-10
-eoldate: 2013-10-10
-category: events
-posttype: news-and-events
-location: Cuenca, Ecuador
-presenter: Cesar D. Guerrero
-website: https://latincom2012.ieee-latincom.org/index.html
-titlelink: https://latincom2012.ieee-latincom.org/index.html
----
-
-Goal: Introductory Tutorial
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/open?id=0B4EuVzA5UdPRX0pBRm5Ub1lVQms) [PowerPoint](https://docs.google.com/open?id=0B4EuVzA5UdPReENMT2VMSWk1Tm8)
diff --git a/_posts/news-and-events/2013-04-02-University-of-Wisconsin-Madison.md b/_posts/news-and-events/2013-04-02-University-of-Wisconsin-Madison.md
deleted file mode 100644
index bb4be69..0000000
--- a/_posts/news-and-events/2013-04-02-University-of-Wisconsin-Madison.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: University of Wisconsin, Madison
-date: 2013-04-02
-eventdate: 2013-04-02
-eoldate: 2014-04-02
-category: news
-posttype: news-and-events
-location: Room 4130, 1210 W. Dayton St, Madison, WI 53706-1685
-presenter: Andrew Moore
-website:
-titlelink: https://www.cs.wisc.edu/
----
-
-Goal: One hour 10G Introductory
diff --git a/_posts/news-and-events/2013-04-08-University-of-Massachusetts-Amherst.md b/_posts/news-and-events/2013-04-08-University-of-Massachusetts-Amherst.md
deleted file mode 100644
index c88a2e3..0000000
--- a/_posts/news-and-events/2013-04-08-University-of-Massachusetts-Amherst.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: University of Massachusetts Amherst
-date: 2013-04-08
-eventdate: 2013-04-08
-eoldate: 2014-04-08
-category: events
-posttype: news-and-events
-location: Marston 132, University of Massachusetts Amherst
-presenter: Andrew Moore
-website:
-titlelink: https://www.umass.edu
----
-
-Goal: One hour 10G Introductory
diff --git a/_posts/news-and-events/2013-04-09-RENCI.md b/_posts/news-and-events/2013-04-09-RENCI.md
deleted file mode 100644
index 5364f3a..0000000
--- a/_posts/news-and-events/2013-04-09-RENCI.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: RENCI
-date: 2013-04-09
-eventdate: 2013-04-09
-eoldate: 2014-04-09
-category: events
-posttype: news-and-events
-location: Biltmore Conference Room, Suite 590, RENCI
-presenter: Adam Covington
-website: http://www.renci.org/calendar/netfpga-the-flexible-open-source-networking-platform
-titlelink: http://www.renci.org/calendar/netfpga-the-flexible-open-source-networking-platform
----
-
-Goal: One hour 10G Introductory
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/file/d/0B4EuVzA5UdPRblBZcGhuOXlFNE0/edit?usp=sharing) [PowerPoint](https://docs.google.com/file/d/0B4EuVzA5UdPRRDVVc3BSVjQ3aEk/edit?usp=sharing)
diff --git a/_posts/news-and-events/2013-04-10-Princeton-University.md b/_posts/news-and-events/2013-04-10-Princeton-University.md
deleted file mode 100644
index 892974c..0000000
--- a/_posts/news-and-events/2013-04-10-Princeton-University.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Princeton University
-date: 2013-04-10
-eventdate: 2013-04-10
-eoldate: 2014-04-10
-category: events
-posttype: news-and-events
-location: Princeton 402, Princeton University
-presenter: Andrew Moore
-website: http://www.cs.princeton.edu/
-titlelink: http://www.cs.princeton.edu/
----
-
-Goal: One hour 10G Introductory
diff --git a/_posts/news-and-events/2013-04-11-Case-Western-Reserve-University.md b/_posts/news-and-events/2013-04-11-Case-Western-Reserve-University.md
deleted file mode 100644
index 90000a6..0000000
--- a/_posts/news-and-events/2013-04-11-Case-Western-Reserve-University.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Case Western Reserve University
-date: 2013-04-11
-eventdate: 2013-04-11
-eoldate: 2014-04-11
-category: events
-posttype: news-and-events
-location: Case Western Reserve University
-presenter: Adam Covington
-website: http://engineering.case.edu/eecs/node/415
-titlelink: http://engineering.case.edu/eecs/node/415
----
-
-Goal: One hour 10G Introductory
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/file/d/0B4EuVzA5UdPRblBZcGhuOXlFNE0/edit?usp=sharing) [PowerPoint](https://docs.google.com/file/d/0B4EuVzA5UdPRRDVVc3BSVjQ3aEk/edit?usp=sharing)
diff --git a/_posts/news-and-events/2013-04-11-University-of-Pennsylvania.md b/_posts/news-and-events/2013-04-11-University-of-Pennsylvania.md
deleted file mode 100644
index 58d967b..0000000
--- a/_posts/news-and-events/2013-04-11-University-of-Pennsylvania.md
+++ /dev/null
@@ -1,13 +0,0 @@
----
-title: University of Pennsylvania
-date: 2013-04-11
-eventdate: 2013-04-11
-eoldate: 2014-04-11
-category: events
-posttype: news-and-events
-location: 337 Towne Bldg, University of Pennsylvania
-presenter: Andrew Moore
-website:
-titlelink: http://www.upenn.edu/
----
-Goal: One hour 10G Introductory
diff --git a/_posts/news-and-events/2013-04-12-Carnegie-Mellon-University.md b/_posts/news-and-events/2013-04-12-Carnegie-Mellon-University.md
deleted file mode 100644
index 3d3e53a..0000000
--- a/_posts/news-and-events/2013-04-12-Carnegie-Mellon-University.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Carnegie Mellon University
-date: 2013-04-12
-eventdate: 2013-04-12
-eoldate: 2014-04-12
-category: events
-posttype: news-and-events
-location: Robert Mehrabian Collaborative Innovation Center, 4720 Forbes Avenue, Pittsburgh, PA
-presenter: Adam Covington
-website: http://www.pdl.cmu.edu/SDI/2013/041213.html
-titlelink: http://www.pdl.cmu.edu/SDI/2013/041213.html
----
-
-Goal: One hour 10G Introductory
-
-Slides:
-- Day 1: [PDF](https://docs.google.com/file/d/0B4EuVzA5UdPRblBZcGhuOXlFNE0/edit?usp=sharing) [PowerPoint](https://docs.google.com/file/d/0B4EuVzA5UdPRRDVVc3BSVjQ3aEk/edit?usp=sharing)
diff --git a/_posts/news-and-events/2013-05-20-European-Spring-Camp-2013.md b/_posts/news-and-events/2013-05-20-European-Spring-Camp-2013.md
deleted file mode 100644
index 55833a4..0000000
--- a/_posts/news-and-events/2013-05-20-European-Spring-Camp-2013.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: European Spring Camp 2013
-date: 2013-05-20
-eventdate: 2013-05-20
-eoldate: 2014-05-20
-category: events
-posttype: news-and-events
-location: Poznan University of Technology, Poznań, Poland
-presenter: Marek Michalski, PUT and Cambridge NetFPGA Group
-website: http://netfpga.pl/
-titlelink: http://netfpga.pl/
----
-
-Goal: Hands-on, extended week-long event for professors/faculty, researchers and students
diff --git a/_posts/news-and-events/2013-06-05-Microsoft-Research-Cambridge.md b/_posts/news-and-events/2013-06-05-Microsoft-Research-Cambridge.md
deleted file mode 100644
index eb895f2..0000000
--- a/_posts/news-and-events/2013-06-05-Microsoft-Research-Cambridge.md
+++ /dev/null
@@ -1,13 +0,0 @@
----
-title: Microsoft Research Cambridge
-date: 2013-06-05
-eventdate: 2013-06-05
-eoldate: 2014-06-05
-category: events
-posttype: news-and-events
-location: Auditorium, Microsoft Research Ltd, 21 Station Road, Cambridge, CB1 2FB
-presenter: Andrew Moore
-website: http://talks.cam.ac.uk/talk/index/45652
-titlelink: http://talks.cam.ac.uk/talk/index/45652
----
-Goal: One hour 10G Introductory
diff --git a/_posts/news-and-events/2013-07-29-Stanford-Summer-Camp-2013.md b/_posts/news-and-events/2013-07-29-Stanford-Summer-Camp-2013.md
deleted file mode 100644
index 0724da0..0000000
--- a/_posts/news-and-events/2013-07-29-Stanford-Summer-Camp-2013.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Stanford Summer Camp 2013
-date: 2013-07-29
-eventdate: 2013-07-29
-eoldate: 2014-07-29
-category: events
-posttype: news-and-events
-location: Stanford University, CA
-presenter: Stanford NetFPGA Group
-website: /_pages/2013-07-29-NetFPGA-Summer-Camp-2013-Stanford.html
-titlelink: /_pages/2013-07-29-NetFPGA-Summer-Camp-2013-Stanford.html
----
-
-Goal: Hands-on, extended week-long event for professors and students
-
-Slides:
-- Day 1: [PowerPoint](https://docs.google.com/file/d/0B4EuVzA5UdPRN1dZY25OM253SVk)
diff --git a/_posts/news-and-events/2013-09-02-Cambridge-Summer-Camp-2013.md b/_posts/news-and-events/2013-09-02-Cambridge-Summer-Camp-2013.md
deleted file mode 100644
index c46b529..0000000
--- a/_posts/news-and-events/2013-09-02-Cambridge-Summer-Camp-2013.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Cambridge Summer Camp 2013
-date: 2013-09-02
-eventdate: 2013-09-02
-eoldate: 2014-09-02
-category: events
-posttype: news-and-events
-location: Cambridge University, UK
-presenter: Cambridge NetFPGA Group
-website: http://bit.ly/11K1Vub
-titlelink: http://bit.ly/11K1Vub
----
-
-Goal: Hands-on, extended week-long event for faculty, researchers and students
diff --git a/_posts/news-and-events/2013-11-25-Long-Island-University-NY.md b/_posts/news-and-events/2013-11-25-Long-Island-University-NY.md
deleted file mode 100644
index 01fdea9..0000000
--- a/_posts/news-and-events/2013-11-25-Long-Island-University-NY.md
+++ /dev/null
@@ -1,13 +0,0 @@
----
-title: Long Island University, NY
-date: 2013-11-25
-eventdate: 2013-11-25
-eoldate: 2014-11-25
-category: events
-posttype: news-and-events
-location: LIU Brooklyn, 1 University Plaza, Brooklyn New York, 11201-8423
-presenter: Georgina Kalogeridou
-website:
-titlelink: http://www.liu.edu/
----
-Goal: One hour NetFPGA Introductory
diff --git a/_posts/news-and-events/2013-12-12-University-of-Bochum.md b/_posts/news-and-events/2013-12-12-University-of-Bochum.md
deleted file mode 100644
index 0e502c0..0000000
--- a/_posts/news-and-events/2013-12-12-University-of-Bochum.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: University of Bochum
-date: 2013-12-12
-eventdate: 2013-12-12
-eoldate: 2014-12-12
-category: events
-posttype: news-and-events
-location: Universitätsstraße 150 | 44801 Bochum
-presenter: Georgina Kalogeridou
-website:
-titlelink: http://www.ruhr-uni-bochum.de/index_en.htm
----
-
-Goal: One hour NetFPGA Introductory
diff --git a/_posts/news-and-events/2014-02-07-Aston-University.md b/_posts/news-and-events/2014-02-07-Aston-University.md
deleted file mode 100644
index e6d78d4..0000000
--- a/_posts/news-and-events/2014-02-07-Aston-University.md
+++ /dev/null
@@ -1,13 +0,0 @@
----
-title: Aston University
-date: 2014-02-07
-eventdate: 2014-02-07
-eoldate: 2015-02-07
-category: events
-posttype: news-and-events
-location: MB530a, Seminar Room, School of Engineering and Applied Science, Aston University, Aston Triangle, Birmingham, B4 7ET, UK
-presenter: Neelakandan Manihatty Bojan
-website: http://www.aston.ac.uk/eas/research/groups/photonics/seminars/
-titlelink: http://www.aston.ac.uk/eas/research/groups/photonics/seminars/
----
-Goal: Introduction to NetFPGA
diff --git a/_posts/news-and-events/2014-04-07-Tel-Aviv-University.md b/_posts/news-and-events/2014-04-07-Tel-Aviv-University.md
deleted file mode 100644
index 495fd68..0000000
--- a/_posts/news-and-events/2014-04-07-Tel-Aviv-University.md
+++ /dev/null
@@ -1,16 +0,0 @@
----
-title: Tel-Aviv University
-date: 2014-04-07
-eventdate: 2014-04-07
-eoldate: 2015-04-07
-category: events
-posttype: news-and-events
-location: Room 011, EE-Classes Bldg., Tel-Aviv University
-presenter: Noa Zilberman
-website: http://www.eng.tau.ac.il/index.php?option=com_jevents&task=icalrepeat.detail&evid=1121&Itemid=292&year=2014&month=04&day=07&title=electrical-eng-seminar-netfpga-the-flexible-open-source-networking-platform
-titlelink: http://www.eng.tau.ac.il/index.php?option=com_jevents&task=icalrepeat.detail&evid=1121&Itemid=292&year=2014&month=04&day=07&title=electrical-eng-seminar-netfpga-the-flexible-open-source-networking-platform
----
-Goal: One hour NetFPGA Introductory
-
-Slides:
-- Day 1: [PDF](http://www.cl.cam.ac.uk/~nz247/talks/netfpga-short-talk-2014_tau.pdf) [PowerPoint](http://www.cl.cam.ac.uk/~nz247/talks/netfpga-short-talk-2014_TAU.pptx)
diff --git a/_posts/news-and-events/2014-04-08-Technion.md b/_posts/news-and-events/2014-04-08-Technion.md
deleted file mode 100644
index b80a154..0000000
--- a/_posts/news-and-events/2014-04-08-Technion.md
+++ /dev/null
@@ -1,17 +0,0 @@
----
-title: Technion
-date: 2014-04-08
-eventdate: 2014-04-08
-eoldate: 2015-04-08
-category: events
-posttype: news-and-events
-location: CS, Taub 337, Technion
-presenter: Noa Zilberman
-website: http://www.technion.ac.il/en/
-titlelink: http://www.technion.ac.il/en/
----
-
-Goal: One hour NetFPGA Introductory
-
-Slides:
-- Day 1: [PDF](http://www.cl.cam.ac.uk/~nz247/talks/netfpga-short-talk-2014_Technion.pdf) [PowerPoint](http://www.cl.cam.ac.uk/~nz247/talks/netfpga-short-talk-2014_Technion.pptx)
diff --git a/_posts/news-and-events/2014-04-29-Univesity-of-Bristol.md b/_posts/news-and-events/2014-04-29-Univesity-of-Bristol.md
deleted file mode 100644
index 80c7a2e..0000000
--- a/_posts/news-and-events/2014-04-29-Univesity-of-Bristol.md
+++ /dev/null
@@ -1,16 +0,0 @@
----
-title: University of Bristol
-date: 2014-04-29
-eventdate: 2014-04-29
-eoldate: 2015-04-29
-category: events
-posttype: news-and-events
-location: Merchant Venturers' Building, Woodland Road, Clifton, BS8 1UB, Bristol UK
-presenter: Georgina Kalogeridou
-website:
-titlelink: http://www.bris.ac.uk/
----
-Goal: One hour NetFPGA Introductory
-
-Slides:
-- Day 1: [PowerPoint](https://docs.google.com/file/d/0B2ymRoiETCHKWVNFaEdUNlQ0R2c/edit?usp=drive_web)
diff --git a/_posts/news-and-events/2014-05-06-open-source-network-tester-release-1-0-0.md b/_posts/news-and-events/2014-05-06-open-source-network-tester-release-1-0-0.md
deleted file mode 100644
index 19b0633..0000000
--- a/_posts/news-and-events/2014-05-06-open-source-network-tester-release-1-0-0.md
+++ /dev/null
@@ -1,30 +0,0 @@
----
-title: Open Source Network Tester Release 1.0.0
-date: 2014-05-06
-eventdate: 2014-05-06
-eoldate: 2014-05-06
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA Community,
-
-We are pleased to announce the release of OSNT ([www.osnt.org](http://osnt.org/)).
-
-The Open Source Network Tester (OSNT) based on the NetFPGA-10G platform, is a the world's first open-source hardware traffic generator and capture system.
-
-OSNT repository follows the same criteria as the NetFPGA-10G repository.
-
-Users that have access to the NetFPGA-10G repo will also have access to OSNT.
-
-We invite everyone from the community to audit (and improve) our implementation as well as adapt it to their needs.
-
-More information can be found at [https://github.com/NetFPGA/OSNT-Public](https://github.com/NetFPGA/OSNT-Public) NetFPGA developers are encouraged to use/contribute to OSNT repository.
-
-More information about the Traffic Generator can be found at [https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Traffic-Generator](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Traffic-Generator)
-
-More information about the Traffic Monitor can be found at [https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Traffic-Monitor](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Traffic-Monitor)
-
-Thanks,
-
-OSNT team
diff --git a/_posts/news-and-events/2014-07-04-OSNT-1-5-0.md b/_posts/news-and-events/2014-07-04-OSNT-1-5-0.md
deleted file mode 100644
index c0be81c..0000000
--- a/_posts/news-and-events/2014-07-04-OSNT-1-5-0.md
+++ /dev/null
@@ -1,24 +0,0 @@
----
-title: OSNT Release 1.5.0
-date: 2014-07-04
-eventdate: 2014-07-04
-eoldate: 2016-07-04
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA Community,
-
-We are pleased to announce the next OSNT release (1.5.0).
-
-Here are the release notes for 1.5.0:
-
-1. OSNT project is now able to generate packets with the transmission timestamp wiki: [https://github.com/NetFPGA/OSNT-Public/wiki/10G-MAC-Interface-v1.20](https://github.com/NetFPGA/OSNT-Public/wiki/10G-MAC-Interface-v1.20)
-
-2. Software code reorganization: wiki: [https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Driver](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Driver) [https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-apps](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-apps)
-
-The OSNT development team along with the OSNT community is working diligently to extend and expand the system.
-
-Thanks,
-
-OSNT team ([www.osnt.org](http://osnt.org/))
diff --git a/_posts/news-and-events/2014-07-23-NetFPGA-publication-list.md b/_posts/news-and-events/2014-07-23-NetFPGA-publication-list.md
deleted file mode 100644
index 24085f5..0000000
--- a/_posts/news-and-events/2014-07-23-NetFPGA-publication-list.md
+++ /dev/null
@@ -1,18 +0,0 @@
----
-title: NetFPGA publications list
-date: 2014-07-23
-eventdate: 2014-07-23
-eoldate: 2016-07-23
-category: news
-posttype: news-and-events
----
-
-Dear NetFPGA community members,
-
-We are currently updating the contents of NetFPGA's publication list, which can be seen through the following link [https://netfpga.org/publications.html]({% link Publications.html%})
-
-Please contact me directly in case you have any publications involving the NetFPGA platform that are not mentioned in the list. This way we provide the most relevant project developments to the community.
-
-Thanks,
-
-Gianni Antichi gianni.antichi@cl.cam.ac.uk
diff --git a/_posts/news-and-events/2014-07-25-Indian-Institute-of-Science.md b/_posts/news-and-events/2014-07-25-Indian-Institute-of-Science.md
deleted file mode 100644
index e9d1d81..0000000
--- a/_posts/news-and-events/2014-07-25-Indian-Institute-of-Science.md
+++ /dev/null
@@ -1,12 +0,0 @@
----
-title: Indian Institute of Science
-date: 2014-07-25
-eventdate: 2014-07-25
-eoldate: 2015-07-25
-category: events
-posttype: news-and-events
-location: Department of Electronic Systems Engineering, Indian
-presenter: Neelakandan Manihatty Bojan
-website:
-titlelink: https://www.iisc.ac.in
----
diff --git a/_posts/news-and-events/2014-07-30-NetFPGA-10G-Release-5-0-4.md b/_posts/news-and-events/2014-07-30-NetFPGA-10G-Release-5-0-4.md
deleted file mode 100644
index 6211e68..0000000
--- a/_posts/news-and-events/2014-07-30-NetFPGA-10G-Release-5-0-4.md
+++ /dev/null
@@ -1,26 +0,0 @@
----
-title: NetFPGA 10G Release 5.0.4
-date: 2014-07-30
-eventdate: 2014-07-30
-eoldate: 2016-07-30
-category: news
-posttype: news-and-events
----
-
-Greetings Everyone,
-
-We are happy to announce the next NetFPGA-10G release (5.0.4).
-
-Here are the release notes for 5.0.4:
-
-1. Project related information stored in the bitfile.
-
-We have updated the nf10_identifier module to store information related to date and time the synthesis started, board id, release tag, project identification, project features and misc details. So that once the bitfile is loaded in the FPGA, the driver can parse these registers and give some useful information to the users.
-
-Wikipage: [https://github.com/NetFPGA/NetFPGA-public/wiki/Project-related-information-in-bitfiles](https://github.com/NetFPGA/NetFPGA-public/wiki/Project-related-information-in-bitfiles).
-
-The NetFPGA development team along with the NetFPGA community is working diligently to extend and expand the 10G platform.
-
-Thanks,
-
---NetFPGA-Team
diff --git a/_posts/news-and-events/2014-10-13-OSNT-release-2-0-0.md b/_posts/news-and-events/2014-10-13-OSNT-release-2-0-0.md
deleted file mode 100644
index b29a4df..0000000
--- a/_posts/news-and-events/2014-10-13-OSNT-release-2-0-0.md
+++ /dev/null
@@ -1,24 +0,0 @@
----
-title: OSNT Release 2.0.0
-date: 2014-10-13
-eventdate: 2014-10-13
-eoldate: 2016-10-13
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA Community,
-
-We are pleased to announce the next OSNT release (2.0.0).
-
-Here are the release notes for 2.0.0:
-
-1. New DMA HW pcore now available: wiki: [https://github.com/NetFPGA/OSNT-Public/wiki/DMA-v2.00](https://github.com/NetFPGA/OSNT-Public/wiki/DMA-v2.00)
-
-2. New driver now available: wiki: [https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Driver](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Driver)
-
-The OSNT development team along with the OSNT community is working diligently to extend and expand the system.
-
-Thanks,
-
-OSNT team ([www.osnt.org](http://osnt.org/))
diff --git a/_posts/news-and-events/2014-10-15-Announcing-NetFPGA-SUME.md b/_posts/news-and-events/2014-10-15-Announcing-NetFPGA-SUME.md
deleted file mode 100644
index 26923ec..0000000
--- a/_posts/news-and-events/2014-10-15-Announcing-NetFPGA-SUME.md
+++ /dev/null
@@ -1,22 +0,0 @@
----
-title: Announcing NetFPGA SUME
-date: 2014-10-15
-eventdate: 2014-10-15
-eoldate: 2016-10-15
-category: news
-posttype: news-and-events
----
-
-We are excited to announce that new hardware will be joining the NetFPGA family of open-source networking platforms.
-
-The new board, NetFPGA SUME, is an FPGA-based PCI Express board with I/O capabilities for 10 and 100 Gbps operation, an x8 Gen3 PCIe adapter card incorporating Xilinx's Virtex-7 690T FPGA.
-
-The peripheral subsystems adds to the four SFP+ transceivers with replaceable DDR3-SODIMM memories, QDRII+ memories, as well as presenting the 18 remaining transceivers into two expansion interfaces of eight and ten 13.1 Gbps (GTH) transceivers using an VITA-57 compliant FMC connector and an SAMTEC QTH-DP connector.
-
-An article describing the card is to appear in the upcoming September/October issue of IEEE Micro Magazine. You can access the pre-print version of the paper in the following [link](http://www.cl.cam.ac.uk/~nz247/publications/zilberman2014sume.pdf).
-
-At this stage, we want to register the interest in purchasing the board, so as to adapt the upcoming assembly's quantities. If you are interested as an early adopter: joining the alpha programme, or to be kept up to date on the NetFPGA SUME, please fill in this [form]({% link SUME-reg-form.html %}).
-
-We hope you are as excited as we are to have this new addition to our growing family of open-source NetFPGA platforms, and we hope that you will be part of our exciting future.
-
-The NetFPGA SUME team.
diff --git a/_posts/news-and-events/2014-10-21-NetFPGA-10G-Release-5-0-5.md b/_posts/news-and-events/2014-10-21-NetFPGA-10G-Release-5-0-5.md
deleted file mode 100644
index 467b7a5..0000000
--- a/_posts/news-and-events/2014-10-21-NetFPGA-10G-Release-5-0-5.md
+++ /dev/null
@@ -1,22 +0,0 @@
----
-title: NetFPGA 10G Release 5.0.5
-date: 2014-10-21
-eventdate: 2014-10-21
-eoldate: 2016-10-21
-category: news
-posttype: news-and-events
----
-
-Greetings Everyone,
-
-We are happy to announce the next NetFPGA-10G release (5.0.5)
-
-Below you can find the release notes for 5.0.5:
-
-1. Added the Reference Router GUI interface:
The Java GUI allows the user to change entries in the Routing Table and ARP cache as well as the router's MAC and IP addresses. It also provides updates on counter values and graphs of throughput and much more.
wiki: [https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-10G-Reference-Router](https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-10G-Reference-Router)
-
-2. Updated statistics for packets dropped counter at the interface:
The NetFPGA development team along with the NetFPGA community is working diligently to extend and expand the 10G platform.
-
-Thanks,
-
---NetFPGA-Team
diff --git a/_posts/news-and-events/2014-12-22-NetFPGA-Newsletter-December-2014.md b/_posts/news-and-events/2014-12-22-NetFPGA-Newsletter-December-2014.md
deleted file mode 100644
index 3921fa0..0000000
--- a/_posts/news-and-events/2014-12-22-NetFPGA-Newsletter-December-2014.md
+++ /dev/null
@@ -1,57 +0,0 @@
----
-title: NetFPGA Newsletter December 2014
-date: 2014-12-22
-eventdate: 2014-12-22
-eoldate: 2016-12-22
-category: news
-posttype: news-and-events
----
-
-Hi and welcome to the slightly irregular NetFPGA Newsletter
-
-It has been a busy year for NetFPGA in 2014 and this newsletter recaps a few exciting developments
-
-1. SUME
-2. Board refresh
-3. Staffing changes and introductions
-4. 2015 Expectations
-
-
-
-### 1. SUME
-
-NetFPGA SUME [1](/NetFPGA-SUME.html), described in detail in this article [2](http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6866035), is now available for order at the Digilent website [3](http://bit.ly/1v8YdF5).
-
-While it might not be the ideal christmas stocking item; we are excited to see our new board getting into the hands of the user community. The Digilent site has the ordering details [3](http://bit.ly/1v8YdF5).
-
-We will be setting up alpha and beta programmes as in previous years, and let you know when infrastructure is all ready to go; this will happen early in the new year.
-
-### 2. Board refresh
-
-Alongside the NetFPGA SUME which will server as our flagship project board, the answer to the often asked 'will you be updating the NetFPGA-1G board' the answer is a definite yes.
-
-Together with Digilent and CML labs, a NetFPGA release for the CML board has been developed that provides access to ports of the existing (NetFPGA-10G) code base.
-
-See the NetFPGA CML web pages for full details [4](/NetFPGA-CML.html)
-
-If you want to help in some way please do get in touch.
-
-### 3. Staff change and introductions
-
-2014 saw the departure of long-standing NetFPGA staff Adam Covington, we are glad to hear he is enjoying life in the world beyond NetFPGA.
-
-The team taking on the duties Adam has been doing consists of many people and as first in a series of introductions, I'd like to welcome Georgina Kalogeridou in the role of community manager. Georgina will be known to many of you as the author of the test and simulation frameworks for NetFPGA-10G. As part of this new community-manager role, Georgina has been responsible for the roll-out of the new website and alongside being NetFPGA web boss, she will take a more active role to ensure the mailing lists, online material, and forums work to support users across the entire NetFPGA ecosystem from the older 1G NetFPGA CML and our Flagship: NetFPGA SUME.
-
-### 4. 2015 Expectations
-
-We anticipate a busy 2015 for NetFPGA with tutorials for the new NetFPGA SUME in the planning, teaching materials in testing for the NetFPGA boards and a healthy community contributing to current and new projects.
-
-I have plans that this newsletter become a regular item, I hope you won't object and I promise a limit on number of emails to the netfpga announce list.
-
-Wishing everyone a safe and happy holiday season and
-
-best wishes for the new year,
-
-Andrew.
-
-(temporary) editor of the NetFPGA newsletter
diff --git a/_posts/news-and-events/2015-01-13-NetFPGA-10G-Release-5-0-6.md b/_posts/news-and-events/2015-01-13-NetFPGA-10G-Release-5-0-6.md
deleted file mode 100644
index 8850a02..0000000
--- a/_posts/news-and-events/2015-01-13-NetFPGA-10G-Release-5-0-6.md
+++ /dev/null
@@ -1,23 +0,0 @@
----
-title: NetFPGA 10G Release 5.0.6
-date: 2015-01-13
-eventdate: 2015-01-13
-eoldate: 2017-01-13
-category: news
-posttype: news-and-events
----
-
-Greetings Everyone,
-
-Wish you all a happy new year !!!
-
-We are happy to announce the next NetFPGA-10G release (5.0.6).
-
-This is a minor release and the release for 5.0.6 is below:
-
-1. Patch for reference nic project to enable PCIe programming.
-
-
-Thanks,
-
---NetFPGA-team
diff --git a/_posts/news-and-events/2015-02-28-OSNT-2-1-0.md b/_posts/news-and-events/2015-02-28-OSNT-2-1-0.md
deleted file mode 100644
index 7898753..0000000
--- a/_posts/news-and-events/2015-02-28-OSNT-2-1-0.md
+++ /dev/null
@@ -1,26 +0,0 @@
----
-title: OSNT Release 2.1.0
-date: 2015-02-28
-eventdate: 2015-02-28
-eoldate: 2017-02-28
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA Community,
-
-We are pleased to announce the next OSNT release (2.1.0).
-
-Here are the release notes 2.1.0:
-
-1. New 1G interface available with all the features provided for the 10G one: wiki: [https://github.com/NetFPGA/OSNT-Public/wiki/1G-MAC-Interface-v1.20](https://github.com/NetFPGA/OSNT-Public/wiki/1G-MAC-Interface-v1.20) [https://github.com/NetFPGA/OSNT-Public/wiki/DMA-v2.00](https://github.com/NetFPGA/OSNT-Public/wiki/DMA-v2.00)
-
-2. New OSNT_dualspeed project. This is OSNT with port0 and port1 working at 1G, while port2 and port3 working at 10G working at 10G. wiki: [https://github.com/NetFPGA/OSNT-Public/wiki/OSNT_DUALSPEED](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT_DUALSPEED) [https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Driver](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-Driver)
-
-The OSNT development team along with the OSNT community is working diligently to extend and expand the system.
-
-Thanks,
-
-OSNT Team
-
-([www.osnt.org](http://osnt.org/))
diff --git a/_posts/news-and-events/2015-03-12-DATE-2015.md b/_posts/news-and-events/2015-03-12-DATE-2015.md
deleted file mode 100644
index 578af25..0000000
--- a/_posts/news-and-events/2015-03-12-DATE-2015.md
+++ /dev/null
@@ -1,12 +0,0 @@
----
-title: DATE 2015
-date: 2015-03-12
-eventdate: 2015-03-12
-eoldate: 2016-03-12
-category: events
-posttype: news-and-events
-location: University Booth, Booth 4, Exhibition Area
-presenter: Georgina Kalogeridou
-website: http://www.date-conference.com/files/file/date15/ubooth/7734.pdf
-titlelink: http://www.date-conference.com/
----
diff --git a/_posts/news-and-events/2015-04-08-NetFPGA-10G-Release-5-0-7.md b/_posts/news-and-events/2015-04-08-NetFPGA-10G-Release-5-0-7.md
deleted file mode 100644
index 6811a10..0000000
--- a/_posts/news-and-events/2015-04-08-NetFPGA-10G-Release-5-0-7.md
+++ /dev/null
@@ -1,29 +0,0 @@
----
-title: NetFPGA 10G Release 5.0.7
-date: 2015-04-08
-eventdate: 2015-04-08
-eoldate: 2017-04-08
-category: news
-posttype: news-and-events
----
-
-Greetings Everyone,
-
-We are happy to announce the next NetFPGA-10G release (5.0.7)
-
-
-Below you can find the release notes for 5.0.7:
-
-1. nic_naas is a contributed project based on reference_nic project with a high performance DMA and driver. wiki: [https://github.com/NetFPGA/NetFPGA-public/wiki/NiC-NaaS](https://github.com/NetFPGA/NetFPGA-public/wiki/NiC-NaaS)
The above project includes the following new pcores:
-
- 1. output queues with back pressure wiki: [https://github.com/NetFPGA/NetFPGA-public/wiki/BRAM-Output-Queues-with-registers-and-back-pressure](https://github.com/NetFPGA/NetFPGA-public/wiki/BRAM-Output-Queues-with-registers-and-back-pressure)
-
- 2. New DMA (dma v2.10a) wiki: [https://github.com/NetFPGA/NetFPGA-public/wiki/DMA-v2.10](https://github.com/NetFPGA/NetFPGA-public/wiki/DMA-v2.10) and new device driver wiki: [https://github.com/NetFPGA/NetFPGA-public/wiki/Linux-Device-Driver---NIC-NaaS](https://github.com/NetFPGA/NetFPGA-public/wiki/Linux-Device-Driver---NIC-NaaS)
-
-2. Updated test infrastructure to run tests of contrib-projects (nic_naas)
-
-The NetFPGA development team along with the NetFPGA community is working diligently to extend and expand the 10G platform.
-
-Thanks,
-
---NetFPGA-Team
diff --git a/_posts/news-and-events/2015-04-13-NetSoft.md b/_posts/news-and-events/2015-04-13-NetSoft.md
deleted file mode 100644
index dad058f..0000000
--- a/_posts/news-and-events/2015-04-13-NetSoft.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: NetSoft
-date: 2015-04-13
-eventdate: 2015-04-13
-eoldate: 2016-04-13
-category: events
-posttype: news-and-events
-location: University College London
-presenter:
-website: http://sites.ieee.org/netsoft/tutorials/
-titlelink: http://sites.ieee.org/netsoft/
----
-
-Open Source Networking - Half-day tutorial
diff --git a/_posts/news-and-events/2015-04-14-NetSoft.md b/_posts/news-and-events/2015-04-14-NetSoft.md
deleted file mode 100644
index 91ffcf2..0000000
--- a/_posts/news-and-events/2015-04-14-NetSoft.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: NetSoft
-date: 2015-04-14
-eventdate: 2015-04-14
-eoldate: 2016-04-14
-category: events
-posttype: news-and-events
-location: University College London
-presenter:
-website: http://sites.ieee.org/netsoft/demos/
-titlelink: http://sites.ieee.org/netsoft/
----
-
-Goal: An Integrated Environment for Open-Source Network Softwarization
diff --git a/_posts/news-and-events/2015-05-20-SBRC-2015.md b/_posts/news-and-events/2015-05-20-SBRC-2015.md
deleted file mode 100644
index 481d2cf..0000000
--- a/_posts/news-and-events/2015-05-20-SBRC-2015.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: SBRC 2015
-date: 2015-05-20
-eventdate: 2015-05-20
-eoldate: 2016-05-20
-category: events
-posttype: news-and-events
-location: Vitoria Brazil
-presenter: Cesar Marcondes, Ricardo Menotti, Pablo Goulart, Ítalo Cunha, Marcos A. M. Vieira
-website: http://sbrc2015.ufes.br/eng/
-titlelink: http://sbrc2015.ufes.br/eng/
----
-
-Goal: NetFPGA 4-Hours tutorial
diff --git a/_posts/news-and-events/2015-05-26-CML-Release-5-0-5.md b/_posts/news-and-events/2015-05-26-CML-Release-5-0-5.md
deleted file mode 100644
index 6888286..0000000
--- a/_posts/news-and-events/2015-05-26-CML-Release-5-0-5.md
+++ /dev/null
@@ -1,27 +0,0 @@
----
-title: NetFPGA 1G CML Release 5.0.5
-date: 2015-05-26
-eventdate: 2015-05-26
-eoldate: 2017-05-26
-category: news
-posttype: news-and-events
----
-
-Greetings everyone,
-
-We are happy to announce the next NetFPGA-1G-CML release (5.0.5).
-
-Below you can find the release notes for 5.0.5:
-
-1. projects/reference_nic_nf1_cml: The project was modified to support out-of-the-box configuration when it is installed in the on-board BPI during manufacturing.
-
-2. projects/reference_nic_nf1_cml/sw/host/driver: The nf10 driver has been updated to support Linux Kernels 3.17.0 and later.
-
-3. contrib-projects/nf1_cml_io_example: The project demonstrates the use of the onboard LEDs, buttons, SD card, PMODS and DDR memory using standard ISE/EDK IP modules. wiki: [https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-1G-CML-IO-Example-Design](https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-1G-CML-IO-Example-Design)
-
-4. contrib-projects/nf1_cml_crypto_example: The project demonstrates how to access the on-board ATSHA204 CryptoAuthentication chip and on-board Real Time Clock. This project requires the ability to program the on-board PIC MCU. Please see the project README for more details wiki: [https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-1G-CML-Crypto-Example](https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-1G-CML-Crypto-Example)
-
-5. All reference projects in the ./projects directory that do not specifically target the NetFPGA-1G-CML PCB have been removed. This has been done to help reduce any confusion that may exist regarding which projects to use with which card
-
-Thanks,
---CML-Team & NetFPGA-Team
diff --git a/_posts/news-and-events/2015-06-21-Newsletter.md b/_posts/news-and-events/2015-06-21-Newsletter.md
deleted file mode 100644
index 5d99a25..0000000
--- a/_posts/news-and-events/2015-06-21-Newsletter.md
+++ /dev/null
@@ -1,139 +0,0 @@
----
-title: NetFPGA Newsletter June 2015
-date: 2015-06-15
-eventdate: 2015-06-15
-eoldate: 2017-06-15
-category: news
-posttype: news-and-events
----
-
-NetFPGA Newsletter June 2015
-
--=-=-
-
-Hi and welcome to the latest slightly irregular NetFPGA Newsletter
-
-1. Contributions
-2. SUME news
-3. SUME release
-4. Tutorials and Workshops
-5. NetFPGA plans
-
--=-=-
-
-### 1. Contributions
-
-We keenly encourage the NetFPGA community to contribute their projects for others - projects any boards (SUME, CML, 10G, 1G) are solicited.
-
--=-=- Have a project to contribute? email me -=-=-
-
-### 2. SUME news
-
-We have had some questions about changes to the NetFPGA SUME pricing and how best to order boards.
-
-First of all, some brief background. NetFPGA SUME has a fantastic problem - it is an extremely popular board! This has led to its purchase (at the specially-discounted XUP price of 1,675 USD) by some people who are members of the XUP community but not contributors to the NetFPGA community. Xilinx, Digilent and the NetFPGA team have made the following changes to ensure that a sufficient supply of these specially-discounted boards is available to the members of the NetFPGA community.
-
-The new price NetFPGA SUME for non-academic users is now 9,750 USD. The price for academic users who are not contributing to the NetFPGA community is 4,995 USD. The special price of 1,675 USD for contributors to the NetFPGA community is preserved. To ensure that there are sufficient boards at the specially-discounted for NetFPGA community members, we have the following guidance:
-
-'...
-
-The specially discounted NetFPGA SUME boards are reserved for projects that contribute significantly to the open-source goals of the NetFPGA project.
-
-To apply for the discounted rate, please submit a brief abstract of your Digilent using the link: https://netfpga.wufoo.com/forms/netfpga-special-pricing-request/
-
-State clearly how your work contributes to the NetFPGA community. The requests will be evaluated by experts from both Xilinx and the NetFPGA team. Successful applicants will be advised by Digilent how to order their boards at the discounted prices.
-
-...'
-
-The intent of this arrangement is to prioritize access to the specially-discounted NetFPGA SUME boards for the active, contributing members of the NetFPGA community. All other academic groups will still be able to purchase the NetFPGA SUME boards at the higher, (but still heavily subsidized), price of 4,995 USD.
-
-We hope that these arrangements will ensure a steady supply of NetFPGA SUME boards to the networking community.
-
-For those that have had confusing messages from their local Digilent distributors, we encourage you to let Digilent at sales@digilentinc.com know the details as some distributors are operating with old information
-
--=-=-
-
-### 3. SUME release
-
-We are planning for SUME release 1.0 at the end of the week (26th of June).
-
-This release will include
-
-- An acceptance test for you to run to ensure your board is in good health.
-
-The acceptance test was designed to test new boards in a standard operating mode, and it enables testing the major interfaces without special test fixtures.
-
-- Following the acceptance test release, we will start to regularly release SUME reference projects, starting with the reference NIC.
-
-This project is the first of our reference projects and as well as the corse to construct a reference NIC bitfile, it will include linux device drivers, and various support scripts. The reference NIC in this version uses the popular RIFFA DMA engine which is capable of PCI-e gen2 http://rffa.ucsd.edu
-
-All the NetFPGA SUME projects are using Xilinx's Vivado tool-chain and a tcl-based design flow.
-
-- Simulation test environment
-
-- Hardware test environment
-
-For those wanting other reference projects - we have not forgotten you, we are simply running to catchup on this new board and once we have version 1.0 we will look to the future releases that will include
-
-- Reference IPv4 Router
-- Reference Ethernet Switch
-
-and perhaps most exciting
-
-- Reference Multi-table OpenFlow switch - compatible with 1.4
-
-We are also working hard to have an open-source DMA engine that will perform as well as the hardware can offer - a labour of love - we will provide updates as we have them.
-
-Look for announcements on the SUME mailing list.
-
--=-=- Want to be a contributor not just a consumer? email me -=-=-
-
-### 4. Tutorials and Workshops
-
-Here are upcoming tutorials and workshops currently in out calendar.
-
-Courses are delivered in English unless otherwise noted.
-
-Date: August 2-6, 2015
-Location: Technion, Haifa, Israel
-Type: One-week hands-on course
-Hardware: NetFPGA-SUME
-URL: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/technion-august-2015/
-
-Date: August 17, Morning session.
-SIGCOMM 2015, London, Imperial College
-Type: Half-day tutorial on Open Source Hardware including NetFPGA and OSNT
-Hardware: NetFPGA-SUME
-URL: http://conferences.sigcomm.org/sigcomm/2015/tutorial-ohwn.php
-
-Date: August 31, Time TBA
-FPL 2015, London, Imperial College
-Type: Half-day NetFPGA tutorial
-Hardware: NetFPGA_SUME
-URL: TBA
-
-If you wish to consider offering a course do get in contact.
-
--=-=- Want to advertise your NetFPGA course? Want to contribute teaching material? Want to run a NetFPGA course? email me -=-=-
-
-### 5. NetFPGA Plans
-
-I would like to give you some insight into our plans for NetFPGA going forward.
-
-Our current status is this:
-
-NetFPGA-SUME is our top-speed board and it will have the first bundle of software released for it in the coming week. Can you help us port and test interesting projects in the coming months?
-
-NetFPGA-CML has replaced the NetFPGA-1G and is provided with the support of CML. This board supports users who want to build systems based on the reference projects with a limit to 1G Ethernet UTP cabling and 4 x 1Gb/s data rates. Additional facilities, including a CryptAuthentication chip and real-time clock are also part of the CML board.
-
-NetFPGA-10G has been out venerable Virtex-5 workhorse and while projects will still be developed for this board at the end of 2015 we will look to move this board to join NetFGPGA-1G as being supported by the community. To make this happen we want community members to step forward who are willing to work alongside our development team, accepting patches as required and ensuring the 10G board questions get answered. Nothing arduous but this is a community board with community support. With volunteer help we expect to formally we expect to formally move the mailing list into the forums as we find these provide the best method for the community to support itself.
-
-NetFPGA-1G is no longer available for purchase but continues to be supported by the community. If you want to volunteer to answer questions on NetFPGA-1G and to shepherd the forums - email me.
-
--=-=- Want to volunteer as a community-leader? email me -=-=-
-
-Best wishes,
-Andrew.
-(temporary) editor of the NetFPGA newletter
-
--=-=- Want to edit the NetFPGA newsletter? email me. -=-=-
diff --git a/_posts/news-and-events/2015-08-02-Technion.md b/_posts/news-and-events/2015-08-02-Technion.md
deleted file mode 100644
index d66482b..0000000
--- a/_posts/news-and-events/2015-08-02-Technion.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: Technion
-date: 2015-08-02
-eventdate: 2015-08-02
-eoldate: 2016-08-02
-category: events
-posttype: news-and-events
-location: Technion - Israel Institute of Technology
-presenter: TCE - Technion Computer Engineering Center
-website: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/technion-august-2015/
-titlelink: http://www.technion.ac.il/en/
----
-
-Goal: Hands-on, extended week-long event for students, researchers and faulty
-
-Slides:
-- Day 1: [PDF1](https://drive.google.com/open?id=0B2ymRoiETCHKd1lWcVpjclhaRXc) [PDF2](https://drive.google.com/open?id=0B2ymRoiETCHKMFpIakNXSndVMFk)
-- Day 2: [PDF](https://drive.google.com/open?id=0B2ymRoiETCHKbDVqNk9QNUJUYVU)
-- Day 3: [PDF1](https://drive.google.com/open?id=0B2ymRoiETCHKNE1IdGlYdUdyN1k) [PDF2](https://drive.google.com/open?id=0B2ymRoiETCHKcUthSG5hQWZST1U)
-- Day 4: [PDF1](https://drive.google.com/open?id=0B2ymRoiETCHKS0luNXBwQVlsSUE) [PDF2](https://drive.google.com/open?id=0B2ymRoiETCHKVUFoVF91N1F3dWc)
-- Day 5: [PDF](https://drive.google.com/open?id=0B2ymRoiETCHKWW1ySVdpVVA5ajQ)
diff --git a/_posts/news-and-events/2015-08-17-SIGCOMM-demo.md b/_posts/news-and-events/2015-08-17-SIGCOMM-demo.md
deleted file mode 100644
index 4a744d1..0000000
--- a/_posts/news-and-events/2015-08-17-SIGCOMM-demo.md
+++ /dev/null
@@ -1,16 +0,0 @@
----
-title: SIGCOMM Demo
-date: 2015-08-17
-eventdate: 2015-08-17
-eoldate: 2016-08-17
-category: events
-posttype: news-and-events
-location: London, Imperial College
-presenter:
-website: http://conferences.sigcomm.org/sigcomm/2015/papers.php
-titlelink: http://conferences.sigcomm.org/sigcomm/2015/
----
-
-Goal: Demonstrate Open Source Hardware including NetFPGA and OSNT
-
-Target Platform: NetFPGA-SUME
diff --git a/_posts/news-and-events/2015-08-17-SIGCOMM-tutorial.md b/_posts/news-and-events/2015-08-17-SIGCOMM-tutorial.md
deleted file mode 100644
index 343cb3b..0000000
--- a/_posts/news-and-events/2015-08-17-SIGCOMM-tutorial.md
+++ /dev/null
@@ -1,19 +0,0 @@
----
-title: SIGCOMM Tutorial
-date: 2015-08-17
-eventdate: 2015-08-17
-eoldate: 2016-08-17
-category: events
-posttype: news-and-events
-location: London, Imperial College
-presenter:
-website: http://conferences.sigcomm.org/sigcomm/2015/tutorial-ohwn.php
-titlelink: http://conferences.sigcomm.org/sigcomm/2015/
----
-
-Goal: Half-day tutorial on Open Source Hardware including NetFPGA and OSNT
-
-Target Platform: NetFPGA-SUME
-
-Slides:
-- Day 1: [PDF](https://www.dropbox.com/s/q094jabalf5kahj/2015_SIGCOMM_tutorial.pdf?dl=0)
diff --git a/_posts/news-and-events/2015-08-31-FPL-2015.md b/_posts/news-and-events/2015-08-31-FPL-2015.md
deleted file mode 100644
index 54d21f1..0000000
--- a/_posts/news-and-events/2015-08-31-FPL-2015.md
+++ /dev/null
@@ -1,16 +0,0 @@
----
-title: FPL 2015
-date: 2015-08-31
-eventdate: 2015-08-31
-eoldate: 2016-08-31
-category: events
-posttype: news-and-events
-location: London, Imperial College
-presenter:
-website: http://www.cl.cam.ac.uk/research/srg/netos/netfpga/workshop/fpl-august-2015/
-titlelink: http://fpl2015.org/?page=tutorials#t1
----
-
-Goal: Half-day tutorial on Rapid Prototyping of High Bandwidth Devices in Open Source
-
-Target Platform: NetFPGA-SUME
diff --git a/_posts/news-and-events/2015-10-12-NetFPGA-SUME-Release-1-0-0.md b/_posts/news-and-events/2015-10-12-NetFPGA-SUME-Release-1-0-0.md
deleted file mode 100644
index 7266b0a..0000000
--- a/_posts/news-and-events/2015-10-12-NetFPGA-SUME-Release-1-0-0.md
+++ /dev/null
@@ -1,23 +0,0 @@
----
-title: NetFPGA SUME Release 1.0.0
-date: 2015-10-12
-eventdate: 2015-10-12
-eoldate: 2017-10-12
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the first release of the NetFPGA-SUME code base.
-
-The release includes three reference projects:
-- Acceptance test
-- Reference NIC
-- Reference switch
-
-As usual our release also includes a unified test harness, device driver and all other components that make NetFPGA a platform.
-
-NetFPGA-SUME is our first platform to use the Xilinx Vivado tool chain, and while the underlying infrastructure is very different, we believe that you will find the usage experience quite similar to our previous platforms, which should help you quickly and easily start using
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2015-12-16-NetFPGA-SUME-1-1-0.md b/_posts/news-and-events/2015-12-16-NetFPGA-SUME-1-1-0.md
deleted file mode 100644
index 1d66946..0000000
--- a/_posts/news-and-events/2015-12-16-NetFPGA-SUME-1-1-0.md
+++ /dev/null
@@ -1,31 +0,0 @@
----
-title: NetFPGA SUME release 1.1.0
-date: 2015-12-16
-eventdate: 2015-12-16
-eoldate: 2017-12-16
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next minor release (1.1.0) of the NetFPGA-SUME code base.
-
-The release includes:
-
-Projects:
-
-- reference_switch_lite, [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-Reference-Learning-Switch-Lite)
-- reference_switch, [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-Reference-Learning-Switch)
-
-Cores:
-
-- cam_v1_0_0, [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-TCAM-IPs)
-- tcam_v1_0_0, [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-TCAM-IPs)
-- switch_output_port_lookup_v1_0_0
-
-Bug fixes:
-
-- Fixing a typo error in multiple cores
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2016-01-26-NetFPGA-SUME-Release1-2-0.md b/_posts/news-and-events/2016-01-26-NetFPGA-SUME-Release1-2-0.md
deleted file mode 100644
index e1fff8d..0000000
--- a/_posts/news-and-events/2016-01-26-NetFPGA-SUME-Release1-2-0.md
+++ /dev/null
@@ -1,25 +0,0 @@
----
-title: NetFPGA SUME Release 1.2.0
-date: 2016-01-29
-eventdate: 2016-01-29
-eoldate: 2018-01-29
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next minor release (1.2.0) of the NetFPGA-SUME code base.
-
-The release includes:
-
-Projects:
-- Acceptance Test: Added PCIe ibert test
-
-Patch:
-- NfSumeTest: Added a checkbox in the GUI of the acceptance_test to narrow down USB listing
-
-Bug fixes:
-- Fixing a typo error in the Makefile of the acceptance_test project
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2016-02-01-NetFPGA-Newsletter-February-2016.md b/_posts/news-and-events/2016-02-01-NetFPGA-Newsletter-February-2016.md
deleted file mode 100644
index 0e29399..0000000
--- a/_posts/news-and-events/2016-02-01-NetFPGA-Newsletter-February-2016.md
+++ /dev/null
@@ -1,66 +0,0 @@
----
-title: NetFPGA Newsletter February 2016
-date: 2016-02-01
-eventdate: 2016-02-01
-eoldate: 2018-02-01
-category: news
-posttype: news-and-events
----
-
--=-=-
-
-Hi and welcome to latest NetFPGA Newsletter
-
-1. NetFPGA news
-2. SUME release
-3. NetFPGA Community - a solicitation
-
--=-=-
-
-### 1. NetFPGA news
-
-It is with great sadness the departure of two of the NetFPGA team in Cambridge.
-
-Georgina Kalogeridou and Yury Audzevich have moved on from the University of Cambridge, each have been a huge contributor to the success of the NetFPGA project.
-
-I hope they will involved in the NetFPGA project community.
-
-We will sorely miss them both.
-
-However, we do welcome Salvator Galea and Marcin Wojcik please each of them welcome as they contribute to the activities of the NetFPGA community.
-
--=-=- Want to be a contributor not just a consumer? email me -=-=-
-
-NetFPGA SUME has had a new release
-
-The new minor release_1.2.0 is up and running.
-
-Updated also the news in the web page.
-
-NetFPGA SUME v1.2.0
-
-This release contains:
-
-Projects:
-- Acceptance Test: Added PCIe ibert test
-
-Patch:
-- NfSumeTest: Added a checkbox in the GUI of the acceptance_test to narrow down USB device listing
-
-Bug Fix:
-- Fixing an error in the Makefile of the acceptance_test project
-
-
--=-=- Want to advertise your NetFPGA course? Want to contribute to teaching material? Want to run a NetFPGA course? email me -=-=-
-
-### 3. NetFPGA Community Event - a solicitation
-
-We are considering a NetFPGA to be held on the 16th/17th April 2016 co-located with this year's EuroSys conference in London.
-
-If you are interested in this event or others like it please fill in the questionnaire at this [URL](https://goo.gl/HyjU9F)
-
--=-=- Want to volunteer as a community-leader? email me. -=-=-
-
-Best Wishes,
-
-Andrew Moore.
diff --git a/_posts/news-and-events/2016-05-24-NetFPGA-SUME-Release-1-3-0.md b/_posts/news-and-events/2016-05-24-NetFPGA-SUME-Release-1-3-0.md
deleted file mode 100644
index e3df219..0000000
--- a/_posts/news-and-events/2016-05-24-NetFPGA-SUME-Release-1-3-0.md
+++ /dev/null
@@ -1,44 +0,0 @@
----
-title: NetFPGA SUME Release 1.3.0
-date: 2016-05-24
-eventdate: 2016-05-24
-eoldate: 2018-05-24
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next minor release (1.3.0) of the NetFPGA-SUME code base.
-
-The release includes:
-
-Projects:
-- Reference Router
-
-Contributed Projects:
-- Blue Switch
-
-Cores:
-- router_output_port_lookup_v1_0_0: Implementation of IPv4 -- [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-Reference-Router)
-
-Contributed Cores:
-- nf_endianess_manager_v1_0_0: Data conversion between Little <-> Big endianess
-- nf_sume_blueswitch_v1_0_0: Switch implementing multi-table, compliant with OpenFlow protocol -- [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-Blueswitch---Contrib-Project)
-- nf_sume_crossbar_v1_0_0: Part of the BlueSwitch Project -- [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-Blueswitch---Contrib-Project)
-
-Tools:
-- Registers generation infrastructure: Updated version 2, support of indirect register access -- [wiki page](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Registers-Infrastrcture')
-
-Patch:
-- switch_output_port_v1_0_1:
- - Fix a typo in cam instantiation
- - Update the implementation run, to more aggressive timing closure mode
- - Add new CAM parameters (ADDR_TYPE, MATCH_ADDR_WIDTH)
-- xparam2regdefines.py: Fix bug which produced multiple hashes
-
-Xilinx cores:
-- cam_v1_1_0/tcam_v1_1_0: Add new CAM parameters in the wrappers to support the ADDR_TYPE and MATCH_ADDR_WIDTH
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2016-10-04-NetFPGA-SUME-Release-1-4-0.md b/_posts/news-and-events/2016-10-04-NetFPGA-SUME-Release-1-4-0.md
deleted file mode 100644
index ac35d81..0000000
--- a/_posts/news-and-events/2016-10-04-NetFPGA-SUME-Release-1-4-0.md
+++ /dev/null
@@ -1,31 +0,0 @@
----
-title: NetFPGA SUME Release 1.4.0
-date: 2016-10-04
-eventdate: 2016-10-04
-eoldate: 2018-10-14
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today that the next minor update (1.4.0) of the NetFPGA-SUME code base.
-
-The release includes:
-
-Contributed Projects:
-- [Reference NIC-NFMAC10G](https://github.com/forconesi/nfmac10g#nfmac10g-open-source-10gbe-mac-for-fpgas): Implementation of the reference_nic based on the open-source 10GbE MAC
-- [delay_mb](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Latency-Gadget:-delay_mb-Contrib-Project): A latency control gadget that provides latency variation and rate control
-- [reference_eu](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Reference_emu-Contrib-Project): Includes 3 designs written in C# and translated to Verilog, making use of the [Kiwi Compiler](http://www.cl.cam.ac.uk/research/srg/han/hprls/orangepath/kiwic.html)
-
-
-
-Contributed Cores:
-- [nfmac_10ge_interface_shared_v1_0_0](https://github.com/forconesi/nfmac10g#nfmac10g-open-source-10gbe-mac-for-fpgas): Open-source version of the Xilinx ten_gig_eth_mac
-- [nfmac_10ge_interface_v1_0_0](https://github.com/forconesi/nfmac10g#nfmac10g-open-source-10gbe-mac-for-fpgas): Open-source version of the Xilinx ten_gig_eth_mac
-- [delay_v1_0_0](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Delay-Contrib-Core): FIFO-based module that control latency based on timestamps
-- [rate_limiter_v1_0_0](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Rate-Limiter-Contrib-Core): FIFO-based module for pacing of data out of the FIFO
-- [emu_output_port_lookup_v1_0_0](https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Reference_emu-Contrib-Project): Output Port Lookup module that supports the reference_emu project
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2016-11-16-NetFPGA-Development-Challenge-April-2017.md b/_posts/news-and-events/2016-11-16-NetFPGA-Development-Challenge-April-2017.md
deleted file mode 100644
index 16a30db..0000000
--- a/_posts/news-and-events/2016-11-16-NetFPGA-Development-Challenge-April-2017.md
+++ /dev/null
@@ -1,33 +0,0 @@
----
-title: NetFPGA Development Challenge, April-2017
-date: 2016-11-16
-eventdate: 2016-11-16
-eoldate: 2018-11-16
-category: news
-posttype: news-and-events
----
-
-We are pleased to announce the 2017 NetFPGA Design challenge!
-
-The NetFPGA 2017 contest has one design challenge. The design teams have 150 days to produce a working implementation employing any HW and SW design methodology and targeting the NetFPGA SUME platform. The contest begins on November 16th, 2016. The winners will be announced at the NetFPGA Developers summit (Thursday 20th - Friday 21st April, 2017, Cambridge UK)
-
-**Challenge: Lowest Latency Switch**
-
-Low latency devices are Low latency devices are being increasingly used across a large number of applications. Low latency solutions are few, and are rarely open source. The goal of this challenge is to provide a usable, high performance, open source alternative to use by universities and organizations who need the flexibility of open source.
-
-The systems will be evaluated using OSNT, an Open Source Network Tester. Test benches will be available online prior to workshop day, for users to experiment and independently evaluate their design.
-
-The competition is open to students of all levels (undergraduate and postgraduate), as well as to non students. There is no need to own a NetFPGA SUME platform to take part in the competition.
-
-The competition is open to students of all levels (undergraduate and postgraduate), as well as to non students. There is no need to own a NetFPGA SUME platform to take part in the competition.
-
-More details can be found at [http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017](http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017)
-
-Good luck,
-
-The NetFPGA team
-
-
diff --git a/_posts/news-and-events/2016-12-13-NetFPGA-SUME-Release-1-5-0.md b/_posts/news-and-events/2016-12-13-NetFPGA-SUME-Release-1-5-0.md
deleted file mode 100644
index 458af53..0000000
--- a/_posts/news-and-events/2016-12-13-NetFPGA-SUME-Release-1-5-0.md
+++ /dev/null
@@ -1,25 +0,0 @@
----
-title: NetFPGA SUME Release 1.5.0
-date: 2016-12-13
-eventdate: 2016-12-13
-eoldate: 2018-12-13
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next minor (1.5.0) of the NetFPGA-SUME code base.
-
-The release includes:
-
-Updates:
-- nf_10ge_attachment_v1_0_0 : Fix the state machine conditions in tx and rx queue modules to revolve the interface stall issues. Fix the reset signal connection in tx and rx queue modules.
-
-
-Bug Fix:
-- reference_switch_lite: Fix the reset signal which caused negative slack in the reference_switch_lite bitfile
-- axitools.py : Fix a typo, an undefined variable was crashing the script
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2017-02-23-Aston-University.md b/_posts/news-and-events/2017-02-23-Aston-University.md
deleted file mode 100644
index 32f0307..0000000
--- a/_posts/news-and-events/2017-02-23-Aston-University.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: Aston University
-date: 2017-02-23
-eventdate: 2017-02-23
-eoldate: 2018-02-23
-category: events
-posttype: news-and-events
-location: N502, Seminar Room, School of Engineering and Applied Science, Aston University, Aston Triangle, Birmingham, B4 7ET, UK
-presenter: Neelakandan Manihatty Bojan
-website:
-titlelink: https://www.aston.ac.uk
----
-
-NetFPGA Design Challenge Intro + Research Talk
diff --git a/_posts/news-and-events/2017-03-21-NetFPGA-Design-Challenge-April-2017.md b/_posts/news-and-events/2017-03-21-NetFPGA-Design-Challenge-April-2017.md
deleted file mode 100644
index 66fa6ca..0000000
--- a/_posts/news-and-events/2017-03-21-NetFPGA-Design-Challenge-April-2017.md
+++ /dev/null
@@ -1,22 +0,0 @@
----
-title: NetFPGA Design Challenge April 2017
-date: 2017-03-21
-eventdate: 2017-03-21
-eoldate: 2019-03-21
-category: news
-posttype: news-and-events
----
-
-Greetings Everyone,
-
-We keenly encourage your participation in the [NetFPGA Design Challenge April 2017](http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017)
-
-**Prize updates:**
-
-With thanks to IMC we have a cash prize of £1,000
-
-The winning projects and runner ups will be invited to present their work at the NetFPGA Developers Summit 2017. All challenge participants are keenly encouraged to attend the NetFPGA Developers Summit and are entitled to a reduced registration rate.
-
-The design challenge prize pool is generously supported by IMC
-
-More details can be found at: [http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017](http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017)
diff --git a/_posts/news-and-events/2017-03-22-Meet-NetFPGA.md b/_posts/news-and-events/2017-03-22-Meet-NetFPGA.md
deleted file mode 100644
index 5f48b5b..0000000
--- a/_posts/news-and-events/2017-03-22-Meet-NetFPGA.md
+++ /dev/null
@@ -1,25 +0,0 @@
----
-title: Meet NetFPGA
-date: 2017-03-22
-eventdate: 2017-03-22
-eoldate: 2019-03-22
-category: news
-posttype: news-and-events
----
-
-Greetings Everyone,
-
-We have a fantastic set of events over the coming months for you to meet NetFPGA: meeting members of the NetFPGA platform team, and meeting people behind projects such as the [P4](https://www.p4.org) on NetFPGA and [OSNT](https://www.OSNT.org).
-
-- Meet Salvator and Pietro in EPFL at [DATE17 - UNIVERSITY BOOTH SESSION - Session 9 - 30/3/2017 - Thursday, 10:00-16:30](https://www.date-conference.com/date17/exhibition/ub-programme) next week to see a demo of Emu
-- Meet Andrew and Diana at [PAM](https://research.csiro.au/pam2017/) next week to hear about tools and benchmarks
-- [Attend](https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-Developers-Summit-2017) the NetFPGA developers summit April 2017
-- Attend the P4->NetFGA tutorial at P4 workshop (May 16th)
-- For beginners, we have a NetFPGA summer camp in July, including the P4->NetFPGA tutorial - details to be announced shortly!
-- [Attend](http://conferences.sigcomm.org/sigcomm/2017/tutorial-P4-NetFPGA.html) the P4->NetFPGA tutorial at SIGCOMM'17 at UCLA
-- Along with many NetFPGA Systems talks such Noa's talk at [HUJI June'17](http://www.cs.huji.ac.il/event/networking_summer/) check out the [Events](/news-and-events.html) page for up to date lists
-
-
-I hope we will see you there,
-
-Andrew and the NetFPGA team.
diff --git a/_posts/news-and-events/2017-03-22-OSNT-on-SUME-now-available.md b/_posts/news-and-events/2017-03-22-OSNT-on-SUME-now-available.md
deleted file mode 100644
index e841b59..0000000
--- a/_posts/news-and-events/2017-03-22-OSNT-on-SUME-now-available.md
+++ /dev/null
@@ -1,40 +0,0 @@
----
-title: OSNT (Open-Source Network Tester) on SUME now available
-date: 2017-03-22
-eventdate: 2017-03-22
-eoldate: 2019-03-22
-category: news
-posttype: news-and-events
----
-
-Greetings Everyone,
-
-We are pleased to announce the release of OSNT-SUME (available via [www.osnt.org](https://osnt.org)).
-
-The initial OSNT-SUME project is a port of the NetFPGA-10G based OSNTsystem. We are currently planning a native implementation of OSNT-SUME thatwill be able to exploit all the SUME platform capabilities.
-
-The OSNT-SUME repository follows the same criteria as the NetFPGA-SUME repository registration: [http://netfpga.org/SUME-reg-form.html](/SUME-reg-form.html)
-
-Users that have access to the NetFPGA-SUME repo will have also the access to OSNT-SUME.
-
-We invite everyone from the community to audit (and improve) our implementation as well as adapt it to their needs
-
-More information can be found at: [https://github.com/NetFPGA/OSNT-Public](https://github.com/NetFPGA/OSNT-Public)
-
-NetFPGA developers are encouraged to use/contribute to OSNT-SUME repository:
-
-https://github.com/NetFPGA/OSNT-SUME-live
-
-More information about the Traffic Generator can be found at:
-
-[https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-SUME-Generator](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-SUME-Generator)
-
-More information about the Traffic Monitor can be found at:
-
-[https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-SUME-Monitor](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-SUME-Monitor)
-
-More information about the software applications can be found at:
-
-[https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-SUME-applications](https://github.com/NetFPGA/OSNT-Public/wiki/OSNT-SUME-applications)
-
-Thanks, OSNT team
diff --git a/_posts/news-and-events/2017-03-27-DATE-2017.md b/_posts/news-and-events/2017-03-27-DATE-2017.md
deleted file mode 100644
index 1a581f8..0000000
--- a/_posts/news-and-events/2017-03-27-DATE-2017.md
+++ /dev/null
@@ -1,13 +0,0 @@
----
-title: DATE 2017
-date: 2017-03-27
-eventdate: 2017-03-27
-eoldate: 2018-03-27
-category: events
-posttype: news-and-events
-location: University Booth, Exhibition Area
-presenter: Salvator Galea
-target:
-website:
-titlelink: http://www.date-conference.com/
----
diff --git a/_posts/news-and-events/2017-04-18-NetFPGA-Design-Challenge-2017.md b/_posts/news-and-events/2017-04-18-NetFPGA-Design-Challenge-2017.md
deleted file mode 100644
index d737adb..0000000
--- a/_posts/news-and-events/2017-04-18-NetFPGA-Design-Challenge-2017.md
+++ /dev/null
@@ -1,12 +0,0 @@
----
-title: NetFPGA Design Challenge 2017
-date: 2017-04-18
-eventdate: 2017-04-18
-eoldate: 2018-04-18
-category: events
-posttype: news-and-events
-location:
-presenter:
-website:
-titlelink: http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017/
----
diff --git a/_posts/news-and-events/2017-04-20-NetFPGA-Developers-Summit-2017.md b/_posts/news-and-events/2017-04-20-NetFPGA-Developers-Summit-2017.md
deleted file mode 100644
index c717fff..0000000
--- a/_posts/news-and-events/2017-04-20-NetFPGA-Developers-Summit-2017.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: NetFPGA Developers Summit 2017
-date: 2017-04-20
-eventdate: 2017-04-20
-eoldate: 2018-04-20
-category: events
-posttype: news-and-events
-location: University of Cambridge, UK
-presenter:
-website: https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-Developers-Summit-2017
-titlelink: https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-Developers-Summit-2017
----
-
-Goal: A two-days summit for all NetFPGA developers
diff --git a/_posts/news-and-events/2017-07-17-NetFPGA-SUME-Release-1-6-0.md b/_posts/news-and-events/2017-07-17-NetFPGA-SUME-Release-1-6-0.md
deleted file mode 100644
index f956882..0000000
--- a/_posts/news-and-events/2017-07-17-NetFPGA-SUME-Release-1-6-0.md
+++ /dev/null
@@ -1,49 +0,0 @@
----
-title: NetFPGA SUME Release 1.6.0
-date: 2017-07-13
-eventdate: 2017-07-13
-eoldate: 2019-07-13
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next minor release (**1.6.0**) of the NetFPGA-SUME code base.
-
-This release includes:
-
-**Updates:**
-- Xilinx Core
- - cam_v1_1_0 : Change CAM type to BRAM to improve timing
-- Projects
- - reference_nic : Migrate to Vivado v2016.4
- - reference_switch : Migrate to Vivado v2016.4
- - reference_switch_lite : Migrate to Vivado v2016.4
- - reference_router : Migrate to Vivado v2016.4
- - acceptance_test : Migrate to Vivado v2016.4
-
-
-**Bug Fix**
-- switch_output_port_lookup_v1_0_1 : Fix tuser signal handling
-- output_queues_v1_0_0 : Fix output queues handling of tuser
-- cam_v1_1_0 : Fix ternary mode
-
-
-**Contrib Projects:**
-- encap_decap : encap/decap VLAN tag
-- reference_switch_lcam : reference_switch with large CAM
-
-
-**Contrib Cores:**
-- vlan_adder_v1_0_0 : used in encap_decap contrib-project
-- vlan_remover_v1_0_0 : used in encap_decap contrib-project
-- nic_output_port_lookup_v4_0_0 : used in encap_decap contrib-project
-- lcam_output_port_lookup_v1_0_0 : used in reference_switch_lcam contrib-project
-
-
-**Limitations**
-
-All the reference projects work, without any issue, in hosts with 64GB of memory, with Vivado v2016.4.
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2017-07-25-NetFPGA-Summer-School-2017.md b/_posts/news-and-events/2017-07-25-NetFPGA-Summer-School-2017.md
deleted file mode 100644
index be7f441..0000000
--- a/_posts/news-and-events/2017-07-25-NetFPGA-Summer-School-2017.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: NetFPGA Summer School 2017
-date: 2017-07-25
-eventdate: 2017-07-25
-eoldate: 2018-07-25
-category: events
-posttype: news-and-events
-location: University of Cambridge, UK
-presenter:
-website: https://www.cl.cam.ac.uk/research/srg/netos/projects/netfpga/workshop/summer-school-2017/
-titlelink: https://www.cl.cam.ac.uk/research/srg/netos/projects/netfpga/workshop/summer-school-2017/
----
-
-Goal: A five day summit for all NetFPGA developers
diff --git a/_posts/news-and-events/2017-08-03-NetFPGA-SUME-Release-1-6-1.md b/_posts/news-and-events/2017-08-03-NetFPGA-SUME-Release-1-6-1.md
deleted file mode 100644
index 63c8dae..0000000
--- a/_posts/news-and-events/2017-08-03-NetFPGA-SUME-Release-1-6-1.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: NetFPGA SUME Release 1.6.1
-date: 2017-08-03
-eventdate: 2017-08-03
-eoldate: 2019-08-03
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next patch release (**1.6.1**) of the NetFPGA-SUME code base.
-
-This release includes:
-**Hot Fix:**
-- switch_output_port_lookup_v1_0_1 : Fix tuser handling in reference_switch output port lookup
-- router_output_port_lookup_v1_0_0 : Fix the OPL of the reference_router to handle the backpresure and tuser of the modified OQs
-- output_queues_v1_0_0 : Fix output queues handling of tuser + changed AXI-S bus to behave as in other modules
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2017-08-25-SIGCOMM-2017.md b/_posts/news-and-events/2017-08-25-SIGCOMM-2017.md
deleted file mode 100644
index 0566846..0000000
--- a/_posts/news-and-events/2017-08-25-SIGCOMM-2017.md
+++ /dev/null
@@ -1,14 +0,0 @@
----
-title: SIGCOMM 2017
-date: 2017-08-25
-eventdate: 2017-08-25
-eoldate: 2018-08-25
-category: events
-posttype: news-and-events
-location: SIGCOMM 2017, UCLA
-presenter: Stephen Ibanez (Stanford University) and Noa Zilberman (Cambridge University)
-website: https://github.com/NetFPGA/P4-NetFPGA-public/blob/master/slides/P4-NetFPGA-SIGCOMM-17/P4-NetFPGA_SIGCOMM_2017_v2.pdf
-titlelink: http://conferences.sigcomm.org/sigcomm/2017/tutorial-P4-NetFPGA.html
----
-
-Goal: Hands-on, one day tutorial on P4-NetFPGA
diff --git a/_posts/news-and-events/2017-10-13-NetFPGA-SUME-Release-1-7-0.md b/_posts/news-and-events/2017-10-13-NetFPGA-SUME-Release-1-7-0.md
deleted file mode 100644
index 8b6db92..0000000
--- a/_posts/news-and-events/2017-10-13-NetFPGA-SUME-Release-1-7-0.md
+++ /dev/null
@@ -1,29 +0,0 @@
----
-title: NetFPGA SUME Release 1.7.0
-date: 2017-10-13
-eventdate: 2017-10-13
-eoldate: 2019-10-13
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next patch release (**1.7.0**) of the NetFPGA-SUME code base.
-
-This release includes:
-
-**Update:**
-- Ubuntu 16.04 -- Operating System Setup Guide (wiki-page) has been updated
-
-
-**Cores:**
-- nf_10ge_interface_v1_0_0 : Enabled deficit idle count on TX MAC in 10G ports
-- barrier_v1_0_0 : move the inactivity timeout inside barrier definition
-
-
-**Contrib Projects:**
-- reference_switch_lcam : increase CAM size 982 to 1024 entries
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2017-12-14-NetFPGA-SUME-Release-1-7-1.md b/_posts/news-and-events/2017-12-14-NetFPGA-SUME-Release-1-7-1.md
deleted file mode 100644
index 1e2adc5..0000000
--- a/_posts/news-and-events/2017-12-14-NetFPGA-SUME-Release-1-7-1.md
+++ /dev/null
@@ -1,21 +0,0 @@
----
-title: NetFPGA SUME Release 1.7.1
-date: 2017-12-14
-eventdate: 2017-12-14
-eoldate: 2019-12-14
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next patch release (**1.7.1**) of the NetFPGA-SUME code base.
-
-This release includes:
-
-**Hotfix:**
-- Corenf_10ge_interface_v1_0_0 : Disabled deficit idle count on TX MAC in 10G ports as enabling it causes packet drop under some scenarios.
-
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2018-01-30-NetFPGA-SUME-Release-1-8-0.md b/_posts/news-and-events/2018-01-30-NetFPGA-SUME-Release-1-8-0.md
deleted file mode 100644
index d55b612..0000000
--- a/_posts/news-and-events/2018-01-30-NetFPGA-SUME-Release-1-8-0.md
+++ /dev/null
@@ -1,28 +0,0 @@
----
-title: NetFPGA SUME Release 1.8.0
-date: 2018-01-30
-eventdate: 2018-01-30
-eoldate: 2020-01-30
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next patch release (**1.8.0**) of the NetFPGA-SUME code base.
-
-This release includes:
-
-**Fix for manual test via uart not working:**
-- Using UART to run manual test did not work previously for reference_switch and reference_switch_lite. This has been fixed
-
-
-**Fix for acceptance test crash in headless mode:**
-- NfSumeTest.py is run during acceptance test. This script assumed the presence of a display which caused a crash. The fix now allows the script to be run without a display.
-
-
-**New contribution - script to generate the regs_gen.py file:**
-- The new file csv_gen.py can be used instead of running the excel macro inside module_generation.xlsm.
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2018-08-20-SIGCOMM-2018.md b/_posts/news-and-events/2018-08-20-SIGCOMM-2018.md
deleted file mode 100644
index 8e25637..0000000
--- a/_posts/news-and-events/2018-08-20-SIGCOMM-2018.md
+++ /dev/null
@@ -1,13 +0,0 @@
----
-title: SIGCOMM 2018
-date: 2018-08-20
-eventdate: 2018-08-20
-eoldate: 2019-08-20
-category: events
-posttype: news-and-events
-location: Budapest, Hungary
-presenter: Pietro Bressana
-target: NetFPGA SUME
-website: https://conferences.sigcomm.org/sigcomm/2018/tutorial-p4.html
-titlelink: https://conferences.sigcomm.org/sigcomm/2018/
----
diff --git a/_posts/news-and-events/2019-02-24-FPGA-2019.md b/_posts/news-and-events/2019-02-24-FPGA-2019.md
deleted file mode 100644
index 5904d20..0000000
--- a/_posts/news-and-events/2019-02-24-FPGA-2019.md
+++ /dev/null
@@ -1,15 +0,0 @@
----
-title: FPGA 2019
-date: 2019-02-24
-eventdate: 2019-02-24
-eoldate: 2020-02-24
-category: events
-posttype: news-and-events
-location: FPGA 2019, California, USA
-presenter: Stephen Ibanez (Stanford University)
-target: NetFPGA-SUME
-website:
-titlelink: http://www.isfpga.org
----
-
-A tutorial on P4-NetFPGA
diff --git a/_posts/news-and-events/2019-04-01-NetFPGA-SUME-Release-1-9-0.md b/_posts/news-and-events/2019-04-01-NetFPGA-SUME-Release-1-9-0.md
deleted file mode 100644
index 4cb066a..0000000
--- a/_posts/news-and-events/2019-04-01-NetFPGA-SUME-Release-1-9-0.md
+++ /dev/null
@@ -1,35 +0,0 @@
----
-title: NetFPGA SUME Release 1.9.0
-date: 2019-04-01
-eventdate: 2019-04-01
-eoldate: 2021-04-01
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce today the next patch release (**1.9.0**) of the NetFPGA-SUME code base.
-
-This release includes:
-
-**Bug Fix:**
-- nf_axis_converter_v1_0_0: Fix timing issue on the path between the nf_axis_converter and the tx_queue. The timing issue was causing the nf_axis_converter output to be incorrect, which in turn caused the MAC to reject packets of certain lengths. Added an AXIS pipeline stage on the output of the nf_axis_converter
-
-
-**Contrb Projects:**
-- lake: Layered Key-value store, a hardware-based implementation of memcached server
-- reference_emu_dns: Implementation of a DNS server with the Emu framework and integrated into the SUME reference data path
-- nic_v2: Reference NIC with the new DMA engine core
-
-
-**Contrib Cores:**
-- db_v1_0_1: A key-value cache which stores key-value pair on DRAM and BRAM
-- div_v1_0_0: A packet distributer, based on UDP port number and this module acts as in-network computing on-demand controller
-- emudns_output_port_lookup_v1_0_0: Output port lookup core generated by the Emu framework with DNS functionality
-- input_arbiter_6in_v1_0_0: Provides support for an additional internal high-priority 50Gbps queue
-- nf_naudit_dma_v1_0_0: New DMA engine
-- nf_sume_pktgen_v1_0_0: Enables internal packet injection at full speed (~50Gbps)
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2019-04-02-NetFPGA-project-wins-SOSR-System-Award.md b/_posts/news-and-events/2019-04-02-NetFPGA-project-wins-SOSR-System-Award.md
deleted file mode 100644
index 622452b..0000000
--- a/_posts/news-and-events/2019-04-02-NetFPGA-project-wins-SOSR-System-Award.md
+++ /dev/null
@@ -1,28 +0,0 @@
----
-title: NetFPGA project wins SOSR System Award
-date: 2019-04-02
-eventdate: 2019-04-02
-eoldate: 2021-04-02
-category: news
-posttype: news-and-events
----
-
-Greetings NetFPGA community,
-
-We are pleased to announce that the NetFPGA project was awarded today the [ACM SIGCOMM SOSR System Award.](https://conferences.sigcomm.org/sosr/2019/award.html)
-
-The NetFPGA is an open platform enabling researchers and students to build high-speed, hardware-accelerated networking systems. The platform is used by researchers to prototype advanced services for next-generation networks. It is also used in the classroom to teach students how to build network devices, such as Ethernet switches and Internet Protocol (IP) routers. The platform combines both hardware (boards) and software (embedded, tools and applications), together with reference designs and community contributed projects.
-
-Originally developed for teaching at Stanford in 2002 and becoming widely available in 2003, NetFPGA has developed a large community of over 1200 users, using more than 3500 cards, at over 300 universities, in over 60 countries across 6 continents. Alongside supporting academic teaching and research, NetFPGA sees use and contributions from professional research community with over 50 active corporate-based contributors.
-
-The prominent early success of NetFPGA has been its contribution to OpenFlow, which in turn reignited the Software Defined Networking movement. By providing a widely available open-source OpenFlow development platform capable of line-rate operation, NetFPGA was, until commercial uptake, the reference hardware platform for OpenFlow.
-
-In recent years, NetFPGA was increasingly used for the prototyping of programmable data planes, and it currently offers the only open-source hardware target for P4 programs (previously through P4FPGA, and nowadays using the P4->NetFPGA framework).
-
-NetFPGA has been used for the implementation of over 500 research projects, and to date has been referenced in over three thousand publications.
-
-The NetFPGA project is academically led by the Universities of Cambridge and Stanford, supported by generous donations from Xilinx, Micron, Cypress and Linear Technologies and generous support from the National Science Foundation, DARPA, the Research Council UK through the Engineering and Physical Sciences Council, and the European Union's Horizon 2020 research and innovation programme.
-
-"The CTO Office at Xilinx has been involved in the open source NetFPGA project since its inception. In particular, the Xilinx University Program has ensured that the NetFPGA family – featuring multiple generations of Xilinx FPGAs over the years – has been successfully used by academic researchers and teachers. Xilinx Labs has also had direct technical involvements, ranging from NetFPGA board and shell design on the hardware side, to P4→NetFPGA tool flow development on the software side. Xilinx is very happy to see this well-deserved award, which reflects the great impact of NetFPGA worldwide on research and teaching using FPGA-based software-defined networking." - Gordon Brebner, Distinguished Engineer, Xilinx Labs
-
-"Cypress is pleased to continue its support for the NetFPGA project and its valuable training and research work in areas including Cyber Security at the Edge and in the Cloud," said Patrick Kane, director of the Cypress University Alliance, Cypress. "Our relationship with the NetFPGA has spanned over 12 years and has included providing world-class Cypress semiconductor solutions for all versions of the NetFPGA platform."
diff --git a/_posts/news-and-events/2020-10-02-NetFPGA-SUME-Release.md b/_posts/news-and-events/2020-10-02-NetFPGA-SUME-Release.md
deleted file mode 100644
index 1409f11..0000000
--- a/_posts/news-and-events/2020-10-02-NetFPGA-SUME-Release.md
+++ /dev/null
@@ -1,34 +0,0 @@
----
-title: NetFPGA SUME Release 1.10.0
-date: 2020-10-02
-eventdate: 2020-10-02
-eoldate: 2022-10-02
-category: news
-posttype: news-and-events
----
-
-
-Greetings NetFPGA community,
-We are pleased to announce today the next release (**1.10.0**) of the NetFPGA-SUME code base.
-This release includes:
-
-**Reference projects:**
-
-
-- all reference projects and reference cores have been migrated to Vivado 2020.1, Ubuntu 2020.4 LTS and Python 3,
-- new standard core: nic_output_queues - this core is based on the output queue ip core and enables a backpressure to the output port lookup,
-- fix in 10g attachment unit core in TX queue: this enables more efficient version of TX queue and allows to handle deficit idle count (fix from P4-NetFPGA project),
-- reference_nic project has a backpressure enabled in the output queues.
-
-
-**Contrib Projects:**
-
-- corundum: ports of verilog-pcie, verilog-ehternet, and corundum projects to NetFPGA SUME board.
-
-
-**Driver:**
-
-- new SUME riffa driver for FreeBSD.
-
-
-{% include Update-close.md %}
diff --git a/_posts/news-and-events/2021-07-01-Yuta-Tokusashi-Cambridge-NetFPGA-Plus-the-next-generation-of-the-NetFPGA-platforms.md b/_posts/news-and-events/2021-07-01-Yuta-Tokusashi-Cambridge-NetFPGA-Plus-the-next-generation-of-the-NetFPGA-platforms.md
deleted file mode 100644
index f98eed1..0000000
--- a/_posts/news-and-events/2021-07-01-Yuta-Tokusashi-Cambridge-NetFPGA-Plus-the-next-generation-of-the-NetFPGA-platforms.md
+++ /dev/null
@@ -1,12 +0,0 @@
----
-title: NetFPGA-Plus the next generation of the NetFPGA platforms
-date: 2021-06-17
-eventdate: 2021-07-01
-eoldate: 2022-07-01
-category: events
-posttype: news-and-events
-location:
-presenter: Yuta Tokusashi
-website: https://coseners.net/coseners-2021/
-titlelink: https://coseners.net/coseners-2021/
----
diff --git a/_posts/news-and-events/2021-09-24-NetFPGA-PLUS-Release-1.0.md b/_posts/news-and-events/2021-09-24-NetFPGA-PLUS-Release-1.0.md
deleted file mode 100644
index 41e998c..0000000
--- a/_posts/news-and-events/2021-09-24-NetFPGA-PLUS-Release-1.0.md
+++ /dev/null
@@ -1,41 +0,0 @@
----
-title: NetFPGA PLUS Release 1.0.0
-date: 2021-09-24
-eventdate: 2021-09-24
-eoldate: 2023-09-24
-category: news
-posttype: news-and-events
----
-
-It is with great excitement we announce the release of NetFPGA PLUS.
-
-NetFPGA PLUS 1.0.0
-
-NetFPGA PLUS 1.0.0 has arrived, available in a public repository to all, links on the netfpga.org website. I’ve reprinted the outline, included as part of the original announcement, at the bottom of this newsletter. The overly optimistic timetable fell to the brutal realities of the last 9 months.
-
-NetFPGA PLUS has been is a momentous effort that largely has fallen to the broad shoulders of the increasingly slim NetFPGA team at Cambridge; one person in particular deserves much credit for this huge effort and for us achieving this first release.
-
-On behalf of us all, I thank Yuta Tokusashi who has lead the NetFPGA PLUS work throughout this effort and who has managed this despite the extraordinary challenges of the last 18 months.
-
-Many critical issues were managed and overcome with the expert guidance of Noa Zilberman, while release testing and preparation would not have been possible without the assistance of Salvator Galea.
-
-This entire effort was enabled by many members of the excellent Xilinx team from Gordon Brebner’s leadership and enthusiasm through to the phenomenal efforts of the Open-NIC team; notably Yan Zhang, and Chris Neely, as well as critical advice from Cathal McCabe, part of Xilinx in Dublin.
-
-My personal thanks and on behalf of the NetFPGA community to each of them. (I’m excruciatingly aware the moment I send this email I will realise I’ve not credited a critical member of the team - my apologies in advance.)
-
-I will leave some details to a future newsletter - in preparation - but promise it shortly, as soon as we have all caught up on our sleep.
-
-Do check out the new website, thanks to Adam Pettigrew for his efforts there; and of course do check out the public, openly available, Apache licensed, NetFPGA PLUS codebase too!
-
-Items planned for the next announcement will include
-
-1. License change for NetFPGA
-2. NetFPGA PLUS plans
-3. NetFPGA SUME status
-
-
-Thank you all,
-Andrew Moore
-on behalf of the NetFPGA team.
-
-
diff --git a/_posts/news-and-events/example-events-post.md b/_posts/news-and-events/example-events-post.md
deleted file mode 100644
index 46f896a..0000000
--- a/_posts/news-and-events/example-events-post.md
+++ /dev/null
@@ -1,36 +0,0 @@
----
-title: example
-date: 0001-01-01
-eventdate: 0001-01-01
-eoldate: 0001-01-01
-category: events
-posttype: news-and-events
-location: University College London
-presenter:
-website: http://sites.ieee.org/netsoft/tutorials/
-titlelink: http://sites.ieee.org/netsoft/
----
-
-For easy naming convention name the news files should be saved yyyy-mm-dd-title.md
-
-title: Title is the metadata tag that is used to give the name of the post on the website
-
-date: Date is the metadata tag that is used by jekyll to know if it should post the post to the website or not
-
-eventdate: Eventdate is the metadata tag that is used to give the date of the event on the website, this means that the date for the event and the date the event is posted to the website can be different
-
-eoldate: the date for it be removed from the index page, default date is a year after posting
-
-category: declares whether it shows up on the news and events when toggled as well as what content is shown.
-
-posttype: declares the type of the post to where they will be seen on the website
-
-location: Location is the metadata tag that is used to give the place that the event will take place at on the website
-
-presenter: Presenter is the metadata tag that is used to give the person giving the event on the website
-
-website: Website is the metadata tag that is used to give the link of the website to find out more information about the event
-
-titlelink: TitleLink is the link to the organisation that is organising the event
-
-The only metadata tags that are required for an event are title, date and category all other ones present are found using if tags in the events page.
diff --git a/_posts/news-and-events/example-news-post.md b/_posts/news-and-events/example-news-post.md
deleted file mode 100644
index 6fcd4be..0000000
--- a/_posts/news-and-events/example-news-post.md
+++ /dev/null
@@ -1,22 +0,0 @@
----
-title: example
-date: 0001-01-01
-eventdate: 0001-01-01
-eoldate: 0001-01-01
-category: news
-posttype: news-and-events
----
-
-For easy naming convention name the news files should be saved yyyy-mm-dd-title.md
-
-title: Title is the metadata tag that is used to give the title of the post on the website
-
-date: Date is the metadata tag used by jekyll to know when a post should be posted to the website
-
-eventdate: eventdate is the metadata tag that is used to give a date of the post on the website
-
-eoldate: eoldate is the "end of life" date, which is when the news post is removed from the frontpage
-
-category: declares whether it shows up on the events page or on the news page
-
-posttype: declares the type of the post to where they will be seen on the website
diff --git a/_site/CNAME b/_site/CNAME
deleted file mode 100644
index 1de72a1..0000000
--- a/_site/CNAME
+++ /dev/null
@@ -1 +0,0 @@
-netfpga.org
diff --git a/_site/README.md b/_site/README.md
deleted file mode 100644
index ebf63fd..0000000
--- a/_site/README.md
+++ /dev/null
@@ -1,141 +0,0 @@
-# How to edit the website
-
-## How to add Pages
-
-## How to edit the Footer
-
-In the _includes folder you can find the footer.html file as well as the sidebar.html file.
-
-Sidebar.html contains the contact information parts of the footer whereas footer.html only contains the footer element and the copyright declaration.
-
-Editing this file will cause changes to happen on all pages.
-
-## How to edit the Header
-
-In the _includes folder you can find the header.html file.
-
-To change the image in the header go to custom.scss in the _sass folder in the css folder in the assets folder and look for "header#hero".
-
-Editing this file will cause changes to happen on all pages.
-
-## How to edit the Navigation Bar
-
-In the _includes folder you can find the navigation.html file.
-
-To change the text on the left side of the nav bar change the 3rd line from saying "NetFPGA" to the desired new text.
-
-To add new elements to the right side add a new list item to the unordered list.
-
-To add new elements to one of the dropdown menus first select the relevant dropdown menu then add it to the relevant selection of the dropdown menu.
-
-The "Home" dropdown menu is for all the NetFPGA systems with the top section being the supported systems and the bottom section being the old systems.
-
-The "About" dropdown menu is for pages that are gives context on NetFPGA with the top section being pages on the NetFPGA website and the bottom section being pages hosted on different websites.
-
-Editing the Navigation bar will affect every page.
-
-## How to edit the page layout
-
-In the _layouts folder you can find default.html and page.html. Editing either one of these will affect the layout of the page.
-
-To edit the layout with precision edit default.html because page.html uses default.html as its layout
-
-Editing either of these will edit the layout of every page, however changing page.html won't change the layout on the ecosystem page. To change that edit the ecosystem-layout.html.
-
-### Editing the layout of a specific page
-
-To edit the specific of a particular page create a new html file in the _layouts folder and on the page you are editing change the layout to be the new layout you have just made.
-
-## How to edit a particular page
-
-### How to edit the Home Page
-
-To edit the Home page edit the index.html file.
-
-The recent news section can be edited by editing the most-recent-news-posts.html found in the _includes folder
-
-### How to edit the pages for each system
-
-#### How to edit the NetFPGA PLUS page
-
-Edit the NetFGPA-PlUS.html file.
-
-#### How to edit the NetFPGA SUME page
-
-Edit the NetFPGA-SUME.html file.
-
-#### How to edit the NetFPGA CML page
-
-Edit the NetFPGA-CML.html file.
-
-#### How to edit the NetFPGA 10G page
-
-Edit the NetFPGA-10G.html file.
-
-#### How to edit the NetFPGA 1G page
-
-Edit the NetFPGA-1G.html file.
-
-### How to edit the about page
-
-Edit the About.html file.
-
-All logos can be found sorted into hosts and supporters in the Logos folders in the images folder in the assets folder.
-
-### How to edit the ecosystem page
-
-To edit the text at the top of the ecosystem edit the ecosystem.html page.
-
-To edit information on one of the cards check the ecosystem subfolder of the _posts folder. Look for the file with the name of the ecosystem part after the date.
-
-To add a new card check [example-ecosystem.md](/_posts/ecosystem/example-ecosystem.md) for the metadata tags that are needed as well as the purpose of each one. The ecosystem file should be named with the date it was added to the site in the format \-\-\
-\. The date used in the name of the file should be the date the file was added to the website.
-
-To add a new button to the ecosystem page copy and paste one of the buttons that is already in [ecosystem-buttons](/_includes/ecosystem-buttons.html) and then replace the specifics with the relevant information. And make sure that the button is in the correct section on the page.
-
-***If adding new organisations, organisation types, product types, target platforms please make sure to check [adding-to-javascript.md](/_posts/ecosystem/adding-to-javascript.md)***
-
-### How to edit the Publications to page
-
-Each years publications are in the _includes folder with the naming system of \-Publications.html
-To add publications to a particular year edit the corresponding file for the year.
-
-To add a new years publications follow the same format as the most recent years one. But where it uses a year use the current year. Then add the class "collapsed" to the div with the button in and remove the "show" class from the div with the list of publications in.
-
-Then add:
-
-*{% include \-Publications.html %}*
-
-*\*
-
-*\ *
-
-to Publications.html
-
-### How to edit the news and events page
-
-To edit the functionality of the checkboxes edit the [news-and-events.html](/news-and-events.html) file.
-
-To change the information about a specific event/piece of news look for the file you're looking for in the news-and-events subfolder of the _posts folder and all files that show up on the website have file names looking like \-\-\